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HC20K400 Datasheet(PDF) 9 Page - Altera Corporation |
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HC20K400 Datasheet(HTML) 9 Page - Altera Corporation |
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9 / 36 page  Altera Corporation 8–1 September 2008 8. Description, Architecture, and Features Introduction HardCopy® APEXTM devices extend the flexibility of high-density FPGAs to a cost-effective, high-volume production solution. The migration process from an Altera® FPGA to a HardCopy APEX device offers seamless migration of a high-density system-on-a-programmable-chip (SOPC) design to a low-cost alternative device with minimal risk. Using HardCopy APEX devices, Altera’s SOPC solutions can be leveraged from prototype to production, while reducing costs and speeding time-to-market. A significant benefit of HardCopy devices is that customers do not need to be involved in the device migration process. Unlike application-specific integrated circuit (ASIC) development, the HardCopy design flow does not require generation of test benches, test vectors, or timing and functional simulation. The HardCopy migration process only requires the Quartus® II software-generated output files from a fully functional APEX 20KE or APEX 20KC device. Altera performs the migration and delivers functional prototypes in as few as seven weeks. A risk-free alternative to ASICs, HardCopy APEX devices are customizable, full-featured devices created by Altera’s proprietary design migration methodology. They are based on Altera’s industry-leading high-density device architecture and use an area-efficient sea-of-logic-elements (SOLE) core. HardCopy APEX devices retain all the same features as the APEX 20KE and APEX 20KC devices, which combine the strength of LUT-based and product-term-based devices in conjunction with the same embedded memory structures. All routing resources that were programmable in the APEX 20K device family are replaced by custom interconnect, resulting in a considerable die size reduction and subsequent cost saving. The SRAM configuration cells of the original FPGA are replaced in HardCopy APEX devices by metal elements, which define the function of each logic element (LE), embedded memory, and I/O cell in the device. These resources are connected to each other using the same metallization layers. Once a HardCopy APEX device has been manufactured, the functionality of the device is fixed and no programming is possible. Altera performs the migration of the original FPGA design to an equivalent HardCopy APEX device using a proprietary design migration flow. H51007-2.3 |
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