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SN74ABTH16260DL Datasheet(PDF) 2 Page - Texas Instruments |
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SN74ABTH16260DL Datasheet(HTML) 2 Page - Texas Instruments |
2 / 8 page SN54ABT16260, SN74ABTH16260 12-BIT TO 24-BIT MULTIPLEXED D-TYPE LATCHES WITH 3-STATE OUTPUTS SCBS204C – JUNE 1992 – REVISED MAY 1997 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 description (continued) When VCC is between 0 and 2.1 V, the device is in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 2.1 V, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. The SN54ABT16260 is characterized for operation over the full military temperature range of –55 °C to 125°C. The SN74ABTH16260 is characterized for operation from –40 °C to 85°C. Function Tables B TO A (OEB = H) INPUTS OUTPUT 1B 2B SEL LE1B LE2B OEA A H X H H X L H L XH HX L L X XH L X L A0 X HL X H L H X LL X H L L X XL XL L A0 X X X X X H Z A TO B (OEA = H) INPUTS OUTPUTS A LEA1B LEA2B OE1B OE2B 1B 2B H H H L L H H L HH L L L L H HL L L H 2B0 L HL L L L 2B0 H LH L L 1B0 H L LH L L 1B0 L X LL L L 1B0 2B0 X XX H H Z Z X X X L H Active Z X XX H L Z Active X X X L L Active Active |
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