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EC3A-2 Datasheet(PDF) 1 Page - RCD COMPONENTS INC. |
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EC3A-2 Datasheet(HTML) 1 Page - RCD COMPONENTS INC. |
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1 / 1 page RCD Components Inc, 520 E.Industrial Park Dr, Manchester, NH, USA 03109 rcdcomponents.com Tel: 603-669-0054 Fax: 603-669-5455 Email:sales@rcdcomponents.com FA112 Sale of this product is in accordance with GF-061. Specifications subject to change without notice. PROGRAMMABLE ECL DELAY LINES RESISTORS CAPACITORS COILS DELAY LINES Incremental delays of 0.5nS to 10nS Choice of 16-pin DIP or SM package EC3A 3 BIT 10K ECL LOGIC EC3H 3 BIT 10KH ECL LOGIC L C E K 0 1 N / P D C R L C E H K 0 1 N / P D C R l a t n e m e r c n I r e p y a l e D ) S n ( p e t S f e R ( r o r r E ) " 0 0 0 " o t ) 1 P * 2 P * 3 P ( g n it t e S m a r g o r P r e p S n n i y a l e D - " 0 0 0 " o t d e c n e r e f e R 0 0 01 0 00 1 01 1 00 0 11 0 10 1 11 1 1 5 . 0 - A 3 C E5 . 0 - H 3 C E5 2 . ± 5 . 00 3 . ±* 05 . 00 . 15 . 10 . 25 . 20 . 35 . 3 5 7 . 0 - A 3 C E5 7 . 0 - H 3 C E3 . ± 5 7 . 00 5 . ±* 05 7 . 05 . 15 2 . 20 . 35 7 . 35 . 45 2 . 5 1 - A 3 C E1 - H 3 C E4 . ± 0 . 10 5 . ±* 00 . 10 . 20 . 30 . 40 . 50 . 60 . 7 5 2 . 1 - A 3 C E5 2 . 1 - H 3 C E5 . ± 5 2 . 10 7 . ±* 05 2 . 15 . 25 7 . 30 . 55 2 . 65 . 75 7 . 8 5 . 1 - A 3 C E5 . 1 - H 3 C E5 . ± 5 . 10 7 . ±* 05 . 10 . 35 . 40 . 65 . 70 . 95 . 0 1 2 - A 3 C E2 1 - H 3 C E7 . ± 0 . 20 8 . ±* 00 . 20 . 40 . 60 . 80 12 14 1 5 . 2 - A 3 C E5 . 2 - H 3 C E7 . ± 5 . 20 9 . ±* 05 . 20 . 55 . 70 15 . 2 15 15 . 7 1 3 - A 3 C E3 - H 3 C E7 . ± 0 . 30 . 1 ±* 00 . 30 . 60 . 92 15 18 11 2 5 - A 3 C E5 - H 3 C E1 ± 0 . 55 . 1 ±* 00 . 50 15 10 25 20 35 3 0 1 - A 3 C E0 1 - H 3 C E5 . 1 ± 0 10 . 3 ±* 00 10 20 30 40 50 60 7 * Inherent delay of EC3A 10K ECL is 3 ± 0.5nS and inherent delay of EC3H 10KH ECL is 1.5 ± 0.5nS. The initial delay and cumulative tolerances is referenced to setting “000.” For example, the setting “111” delay of EC3A-1 is 7.0 ± 0.5 nS ref. to “000,” and 10.0 ± 1.0 ns referenced to the input. The setting “111” delay of EC3H-1 is 7.0 ± 0.5 nS ref. to “000,” and 8.5 ± 1.0 ns referenced to the input. * INPUT LOADING AT PIN #6: internally connected to eight ECL gate inputs terminated by Thevenin equivalent of 100 Ohms to -2V. EC3A 10K ECL OPERATING SPECIFICATIONS VEESupply Voltage: -5.20 ± 0.25VDC IEE Supply Current: 60 mA typical Logic “1” Input: VIH= -.98V min., IIH= 265 µA max, IIH (pin 6*)= -11mA typ. Logic “0” Input: VIL= -1.63V max, IIL= 0.5 µA min., IIL (Pin 6*)= -2mA typ. VOH Logic “1” Voltage Out: -.96V min. VOL Logic “0” Voltage Out: -1.65V max. Input Pulse Width: 40% of max. delay min. Operating Temp. Range: -30 to +85°C Storage Temperature Range: -65 to +150°C EC3H 10KH ECL OPERATING SPECIFICATIONS VEESupply Voltage: -5.20 ± 0.25VDC IEE Supply Current: 75 mA typical Logic “1” Input: VIH= -.98V min., IIH= 320 µA max, IIH (pin 6*)= -11mA typ. Logic “0” Input: VIL= -1.63V max, IIL= 0.7 µA min., IIL(Pin 6*)= -2mA typ. VOH Logic “1” Voltage Out: -.96V min. VOL Logic “0” Voltage Out: -1.65V max. Input Pulse Width: 40% of max. delay min. Operating Temp. Range: -30 to +85°C Storage Temperature Range: -65 to +150°C Type EC3A & EC3H (16-pin DIP) Type EC3AG & EC3HG (16-pin SMD *) * Info on SM package is preliminary Packaging: B=Bulk (magazine tube std) .12 [3] min .295 [7.5] max. → ←.10 [2.54] ←.895 [22.7] Max. → ↑ ↓ .700 ± .010 [17.8 ± .25] ← → .300±.01 [7.6±.25] .40 [10.2] max SIDE VIEW .10 [2.54] → ← .020 [.5] → ← TOP VIEW 16 9 1 8 .420 [10.67] max .285 [7.24] .300 [7.6] .300 [7.62] ←.895 [22.7] Max. → P/N DESIGNATION: Termination: W=Lead-free, Q=Tin/Lead (leave blank if either is acceptable) RCD Type: EC3A, EC3H Delay Time (incremental delay per step) Options: assigned by RCD (leave blank if std.) EC3A AG - 10 - B W Surface Mount Option: G (leave blank if standard thru-hole DIP) RoHS Term.W is RoHS compliant 2 7 10 9 OUT IN 6 1,16 E P1 P2 P3 Vee 15 Vcc 8 CIRCUIT SCHEMATIC: ENABLE input E (pin #2) is active low. Output is disabled (low) when pin #2 is logic high. |
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Similar Description - EC3A-2 |
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