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ADS-944MC Datasheet(PDF) 3 Page - Murata Power Solutions Inc. |
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ADS-944MC Datasheet(HTML) 3 Page - Murata Power Solutions Inc. |
3 / 8 page ADS-944 3 ® ® +25°C 0 to +70°C –55 to +125°C DYNAMIC PERFORMANCE cont. MIN. TYP. MAX. MIN. TYP. MAX. MIN. TYP. MAX. UNITS S/H Acquisition Time ( to ±0.003%FSR, 2.5V step) — 85 90 — 85 90 — 85 90 ns Overvoltage Recovery Time — 200 — — 200 — — 200 — ns A/D Conversion Rate 5 — — 5 — — 5 — — MHz DIGITAL OUTPUTS Logic Levels Logic "1" +2.4 — — +2.4 — — +2.4 — — Volts Logic "0" — — +0.4 — — +0.4 — — +0.4 Volts Logic Loading "1" — — –4 — — –4 — — –4 mA Logic Loading "0" — — +4 — — +4 — — +4 mA Delay, Edge of ENABLE to Output Data Valid/Invalid — — 10 — — 10 — — 10 ns Output Coding Offset Binary, Complementary Offset Binary, Two's Complement POWER REQUIREMENTS Power Supply Ranges +15V Supply +14.25 +15.0 +15.75 +14.25 +15.0 +15.75 +14.25 +15.0 +15.75 Volts –15V Supply –14.25 –15.0 –15.75 –14.25 –15.0 –15.75 –14.25 –15.0 –15.75 Volts +5V Supply +4.75 +5.0 +5.25 +4.75 +5.0 +5.25 +4.9 +5.0 +5.25 Volts –5V Supply –4.95 –5.2 –5.45 –4.95 –5.2 –5.45 –5.1 –5.2 –5.45 Volts Power Supply Currents +15V Supply — +36 +45 — +36 +45 — +36 +45 mA –15V Supply — –55 –65 — –55 –65 — –55 –65 mA +5V Supply — +155 +168 — +155 +168 — +155 +168 mA –5.2V Supply — –167 –175 — –167 –175 — –167 –175 mA Power Dissipation — 2.95 3.3 — 2.95 3.3 — 2.95 3.3 Watts Power Supply Rejection — — ±0.05 — — ±0.05 — — ±0.05 %FSR/%V TECHNICAL NOTES 1. Obtaining fully specified performance from the ADS-944 requires careful attention to pc-card layout and power supply decoupling. The device's analog and digital ground systems are not connected to each other internally. For optimal performance, tie all ground pins (4, 6, 11, and 15) directly to a large analog ground plane beneath the package. Bypass all power supplies to ground with 4.7µF tantalum capacitors in parallel with 0.1µF ceramic capaci- tors. It is very important that the bypass capacitors be located as close to the unit as possible. Inductors or ferrite beads can also be used to improve the power supply filtering. Refer to Figure 4, the ADS-944 Evaluation Board Schematic, for more details. 2. The ADS-944 achieves its specified accuracies without the need for external calibration. If required, the device's small initial offset and gain errors can be reduced to zero using the adjustment circuitry shown in Figure 2. When using this circuitry, or any similar offset and gain-calibration hardware, make adjustments following warmup. To avoid interaction, always adjust offset before gain. 3. Pin 8 (COMP. BITS) selects the ADS-944's digital output coding. When a logic "1" is applied to pin 8, the output coding is complementary offset binary. When pin 8 has a logic "0" applied, the output coding becomes offset binary. The MSB output (pin 31) may be used under these condi- tions to achieve two's complement coding. Pin 8 is TTL- compatible and can be driven with digital logic for those who want dynamic control of its function. There is an internal pull-up resistor on this pin, allowing pin 8 to be either connected to +5V or left open when a logic "1" is needed. 4. To enable the three-state outputs, apply a logic "0" (low) to OUTPUT ENABLE (pin 9). To disable, apply a logic "1" (high) to pin 9. Footnotes: All power supplies should be on before applying a start convert pulse. All supplies and the clock (start convert pulses) must be present during warmup periods. The device must be continuously converting during this time. When COMP. BITS (pin 8) is low, logic loading "0" will be –350µA for this pin. An 80ns wide start convert pulse is used for all production testing. The start convert pulse should be between 40 – 80ns or 130 – 160ns to ensure proper operations. The latter range could be used for those applications requiring less than a 5MHz sampling rate. 6.02 (SNR + Distortion) – 1.76 + 20 log Full Scale Amplitude Actual Input Amplitude Effective bits is equal to: This is the time required before the A/D output is valid after the analog input is back within its range. The minimum supply voltages of +4.9V and –5.1V for ±VDD are required for –55°C operations only. The minimum limits are +4.75V and –4.95V when operating at +125°C. Typical +5V and –5.2V current drain breakdowns are as follows: +5VAnalog = +85mA –5.2VAnalog = –114mA +5VDigital = +70mA –5.2VDigital = –53mA +5VTotal = +155mA –5.2VTotal = –167mA |
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