SN54BCT125A, SN74BCT125A

QUADRUPLE BUS BUFFER GATES

WITH 3-STATE OUTPUTS

SCBS032F – SEPTEMBER 1988 – REVISED MARCH 2003

5

POST OFFICE BOX 655303

PARAMETER MEASUREMENT INFORMATION

NOTES: A. CL includes probe and jig capacitance.

B. All input pulses are supplied by generators having the following characteristics: PRR

≤ 10 MHz, tr = tf ≤ 2.5 ns, duty cycle = 50%.

C. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.

Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.

D. The outputs are measured one at a time with one transition per measurement.

E. When measuring propagation delay times of 3-state outputs, switch S1 is open.

F. All parameters and waveforms are not applicable to all devices.

From Output

Under Test

Test

Point

R1

CL

(see Note A)

LOAD CIRCUIT FOR

TOTEM-POLE OUTPUTS

LOAD CIRCUIT FOR

3-STATE AND OPEN-COLLECTOR OUTPUTS

R1

S1

7 V (tPZL, tPLZ, O.C.)

Open

(all others)

From Output

Under Test

Test

Point

R2

CL

(see Note A)

RL = R1 = R2

1.5 V

1.5 V

1.5 V

3 V

3 V

0 V

0 V

th

tsu

VOLTAGE WAVEFORMS

SETUP AND HOLD TIMES

Timing Input

(see Note B)

Data Input

(see Note B)

1.5 V

1.5 V

3 V

3 V

0 V

0 V

High-Level

Pulse

(see Note B)

Low-Level

Pulse

tw

VOLTAGE WAVEFORMS

PULSE DURATION

1.5 V

1.5 V

tPHL

tPLH

tPLH

tPHL

Input

(see Note B)

Out-of-Phase

Output

(see Note D)

1.5 V

1.5 V

1.5 V

1.5 V

1.5 V

1.5 V

3 V

0 V

VOL

VOH

VOH

VOL

In-Phase

Output

(see Note D)

VOLTAGE WAVEFORMS

PROPAGATION DELAY TIMES (see Note D)

tPHZ

tPLZ

0.3 V

tPZL

tPZH

1.5 V

1.5 V

1.5 V

1.5 V

3 V

0 V

Output

Control

(low-level enable)

Waveform 1

(see Notes C and D)

Waveform 2

(see Notes C and D)

0 V

VOH

VOL

3.5 V

0.3 V

VOLTAGE WAVEFORMS

ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS

Figure 1. Load Circuit and Voltage Waveforms