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SN54BCT8373A Datasheet(PDF) 2 Page - Texas Instruments |
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SN54BCT8373A Datasheet(HTML) 2 Page - Texas Instruments |
2 / 26 page SN54BCT8373A, SN74BCT8373A SCAN TEST DEVICES WITH OCTAL D-TYPE LATCHES SCBS044F – JUNE 1990 – REVISED JULY 1996 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 description (continued) Four dedicated test terminals are used to control the operation of the test circuitry: test data input (TDI), test data output (TDO), test mode select (TMS), and test clock (TCK). Additionally, the test circuitry can perform other testing functions such as parallel signature analysis (PSA) on data inputs and pseudo-random pattern generation (PRPG) from data outputs. All testing and scan operations are synchronized to the TAP interface. The SN54BCT8373A is characterized for operation over the full military temperature range of – 55 °C to 125°C. The SN74BCT8373A is characterized for operation from 0 °C to 70°C. FUNCTION TABLE (normal mode, each latch) INPUTS OUTPUT OE LE D Q L H H H L HL L L LX Q0 H X X Z logic symbol† SCAN ’BCT8373A 1D 23 1D 1Q 2 TDI 14 TDI TCK-IN EN 24 22 2D 2Q 3 TMS 12 TMS 13 TCK C1 1 LE TCK-OUT 21 3D 3Q 4 20 4D 4Q 5 19 5D 5Q 7 17 6D 6Q 8 16 7D 7Q 9 15 8D 8Q 10 OE Φ TDO 11 TDO † This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. Pin numbers shown are for the DW, JT, and NT packages. |
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