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SN54HC594J Datasheet(PDF) 8 Page - Texas Instruments |
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SN54HC594J Datasheet(HTML) 8 Page - Texas Instruments |
8 / 9 page SN54HC594, SN74HC594 8-BIT SHIFT REGISTERS WITH OUTPUT REGISTERS SCLS040C – DECEMBER 1982 – REVISED FEBRUARY 1998 8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 PARAMETER MEASUREMENT INFORMATION VOLTAGE WAVEFORMS SETUP AND HOLD AND INPUT RISE AND FALL TIMES VOLTAGE WAVEFORMS PULSE DURATIONS th tsu 50% 50% 50% 10% 10% 90% 90% VCC VCC 0 V 0 V tr tf Reference Input Data Input 50% High-Level Pulse 50% VCC 0 V 50% 50% VCC 0 V tw Low-Level Pulse VOLTAGE WAVEFORMS PROPAGATION DELAY AND OUTPUT TRANSITION TIMES 50% 50% 50% 10% 10% 90% 90% VCC VOH VOL 0 V tr tf Input In-Phase Output 50% tPLH tPHL 50% 50% 10% 10% 90% 90% VOH VOL tr tf tPHL tPLH Out-of-Phase Output NOTES: A. CL includes probe and test-fixture capacitance. B. Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr = 6 ns, tf = 6 ns. C. For clock inputs, fmax is measured when the input duty cycle is 50%. D. The outputs are measured one at a time with one input transition per measurement. E. tPLH and tPHL are the same as tpd. F. tf and tr are the same as tt. Test Point From Output Under Test CL (see Note A) LOAD CIRCUIT Figure 1. Load Circuit and Voltage Waveforms |
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