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SN74LV14APW Datasheet(PDF) 1 Page - Texas Instruments |
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SN74LV14APW Datasheet(HTML) 1 Page - Texas Instruments |
1 / 16 page SN54LV14A, SN74LV14A HEX SCHMITT TRIGGER INVERTERS SCLS386J − SEPTEMBER 1997 − REVISED APRIL 2005 1 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 D 2-V to 5.5-V VCC Operation D Max tpd of 10 ns at 5 V D Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C D Typical VOHV (Output VOH Undershoot) >2.3 V at VCC = 3.3 V, TA = 25°C D Support Mixed-Mode Voltage Operation on All Ports D Ioff Supports Partial-Power-Down Mode Operation D Latch-Up Performance Exceeds 250 mA Per JESD 17 D ESD Protection Exceeds JESD 22 − 2000-V Human-Body Model (A114-A) − 200-V Machine Model (A115-A) − 1000-V Charged-Device Model (C101) 1 2 3 4 5 6 7 14 13 12 11 10 9 8 1A 1Y 2A 2Y 3A 3Y GND VCC 6A 6Y 5A 5Y 4A 4Y SN54LV14A ...J OR W PACKAGE SN74LV14A . . . D, DB, DGV, NS, OR PW PACKAGE (TOP VIEW) 32 1 20 19 910 11 1213 4 5 6 7 8 18 17 16 15 14 6Y NC 5A NC 5Y 2A NC 2Y NC 3A SN54LV14A . . . FK PACKAGE (TOP VIEW) NC − No internal connection SN74LV14A . . . RGY PACKAGE (TOP VIEW) 114 78 2 3 4 5 6 13 12 11 10 9 6A 6Y 5A 5Y 4A 1Y 2A 2Y 3A 3Y description/ordering information These hex Schmitt-trigger inverters are designed for 2-V to 5.5-V VCC operation. The ’LV14A devices contain six independent inverters. These devices perform the Boolean function Y = A. These devices are fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down. ORDERING INFORMATION TA PACKAGE† ORDERABLE PART NUMBER TOP-SIDE MARKING QFN − RGY Reel of 1000 SN74LV14ARGYR LV14A SOIC − D Tube of 50 SN74LV14AD LV14A SOIC − D Reel of 2500 SN74LV14ADR LV14A SOP − NS Reel of 2000 SN74LV14ANSR 74LV14A −40 °C to 85°C SSOP − DB Reel of 2000 SN74LV14ADBR LV14A −40 C to 85 C Tube of 90 SN74LV14APW TSSOP − PW Reel of 2000 SN74LV14APWR LV14A TSSOP − PW Reel of 250 SN74LV14APWT LV14A TVSOP − DGV Reel of 2000 SN74LV14ADGVR LV14A CDIP − J Tube of 25 SNJ54LV14AJ SNJ54LV14AJ −55 °C to 125°C CFP − W Tube of 150 SNJ54LV14AW SNJ54LV14AW −55 C to 125 C LCCC − FK Tube of 55 SNJ54LV14AFK SNJ54LV14AFK † Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Copyright 2005, Texas Instruments Incorporated UNLESS OTHERWISE NOTED this document contains PRODUCTION DATA information current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. |
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