SN54LVC646A, SN74LVC646A

OCTAL BUS TRANSCEIVERS AND REGISTERS

WITH 3-STATE OUTPUTS

SCAS302G – JANUARY 1993 – REVISED JUNE1998

8

POST OFFICE BOX 655303

timing requirements over recommended operating free-air temperature range (unless otherwise

noted) (see Figures 2 through 4)

SN74LVC646A

VCC = 1.8 V

± 0.15 V

VCC = 2.5 V

± 0.2 V

VCC = 2.7 V

VCC = 3.3 V

± 0.3 V

UNIT

MIN

MAX

MIN

MAX

MIN

MAX

MIN

MAX

fclock

Clock frequency

†

†

150

150

MHz

tw

Pulse duration

†

†

3.3

3.3

ns

tsu

Setup time, data before CLK

↑

†

†

1.6

1.5

ns

th

Hold time, data after CLK

↑

†

†

1.7

1.7

ns

† This information was not available at the time of publication.

switching characteristics over recommended operating free-air temperature range (unless

otherwise noted) (see Figure 4)

SN54LVC646A

PARAMETER

FROM

(INPUT)

TO

(OUTPUT)

VCC = 2.7 V

VCC = 3.3 V

± 0.3 V

UNIT

MIN

MAX

MIN

MAX

fmax

150

150

MHz

A or B

B or A

7.9

1

7.4

tpd

CLK

AorB

8.8

1

8.4

ns

SBA or SAB

A or B

9.9

1

8.6

ten

OE

A

10.2

1

8.2

ns

tdis

OE

A

8.9

1

7.5

ns

ten

DIR

B

10.4

1

8.3

ns

tdis

DIR

B

8.7

1

7.9

ns

switching characteristics over recommended operating free-air temperature range (unless

otherwise noted) (see Figures 2 through 4)

SN74LVC646A

PARAMETER

FROM

(INPUT)

TO

(OUTPUT)

VCC = 1.8 V

± 0.15 V

VCC = 2.5 V

± 0.2 V

VCC = 2.7 V

VCC = 3.3 V

± 0.3 V

UNIT

MIN

MAX

MIN

MAX

MIN

MAX

MIN

MAX

fmax

†

†

150

150

MHz

A or B

B or A

†

†

†

†

7.9

1.4

7.4

tpd

CLK

AorB

†

†

†

†

8.8

1.3

8.4

ns

SBA or SAB

A or B

†

†

†

†

9.9

1.4

8.6

ten

OE

A

†

†

†

†

10.2

1

8.2

ns

tdis

OE

A

†

†

†

†

8.9

1

7.5

ns

ten

DIR

B

†

†

†

†

10.4

1.2

8.3

ns

tdis

DIR

B

†

†

†

†

8.7

1.1

7.9

ns

† This information was not available at the time of publication.