SN54LVT8996, SN74LVT8996

3.3-V 10-BIT ADDRESSABLE SCAN PORTS

MULTIDROP-ADDRESSABLE IEEE STD 1149.1 (JTAG) TAP TRANSCEIVERS

SCBS686A – APRIL 1997 – REVISED DECEMBER 1999

1

POST OFFICE BOX 655303

Broad Family of Testability Products

Supporting IEEE Std 1149.1-1990 (JTAG)

Test Access Port (TAP) and Boundary-Scan

Architecture

Higher Levels of System Integration

(Chip/Board) Tests in System Environment

and Secondary TAPs Are Fully 5-V Tolerant

for Interfacing to 5-V and/or 3.3-V Masters

and Targets

Connect of Primary TAP to Secondary TAP

Backplane Wiring Channels

Test-Logic-Reset, Run-Test/Idle, Pause-DR,

and Pause-IR TAP States to Provide for

Board-to-Board Test and Built-In Self-Test

Received/Acknowledged on Primary TAP

1021 User-Specified Board Addresses

Primary-to-Secondary Connection Without

Use of Shadow Protocols

Primary-to-Secondary Connection

Support Backplane Interface at Primary and

High Fanout at Secondary

JESD 78, Class II

– 2000-V Human-Body Model (A114-A)

– 200-V Machine Model (A115-A)

– 1000-V Charged-Device Model (C101)

Small-Outline (DW) and Thin Shrink

Small-Outline (PW) Packages, Ceramic

Chip Carriers (FK), and Ceramic DIPs (JT)

SN54LVT8996 ...JT PACKAGE

SN74LVT8996 . . . DW OR PW PACKAGE

(TOP VIEW)

A4

A3

A2

A1

A0

BYP

GND

PTDO

PTCK

PTMS

PTDI

PTRST

A5

A6

A7

A8

A9

CON

STDI

STCK

STMS

STDO

STRST

1

2

3

4

5

6

7

8

9

10

11

12

24

23

22

21

20

19

18

17

16

15

14

13

17

5

6

7

8

9

10

11

25

24

23

22

21

20

19

43

2

1 28

12 13 14 15 16

A8

A9

NC

CON

STDI

STCK

A1

A0

BYP

NC

GND

PTDO

PTCK

SN54LVT8996 . . . FK PACKAGE

(TOP VIEW)

18

27 26

NC – No internal connection

description

The ’LVT8996 10-bit addressable scan ports (ASP) are members of the Texas Instruments SCOPE

™ testability

integrated-circuit family. This family of devices supports IEEE Std 1149.1-1990 boundary scan to facilitate

testing of complex circuit assemblies. Unlike most SCOPE

™ devices, the ASP is not a boundary-scannable

device, rather, it applies TI’s addressable-shadow-port technology to the IEEE Std 1149.1-1990 (JTAG) test

access port (TAP) to extend scan access beyond the board level.

Copyright

© 1999, Texas Instruments Incorporated

UNLESS OTHERWISE NOTED this document contains PRODUCTION

DATA information current as of publication date. Products conform to

specifications per the terms of Texas Instruments standard warranty.

Production processing does not necessarily include testing of all

parameters.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

SCOPE and TI are trademarks of Texas Instruments Incorporated.