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SN74LVTH18502A Datasheet(PDF) 5 Page - Texas Instruments |
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SN74LVTH18502A Datasheet(HTML) 5 Page - Texas Instruments |
5 / 38 page SN54LVTH18502A, SN54LVTH182502A, SN74LVTH18502A, SN74LVTH182502A 3.3V ABT SCAN TEST DEVICES WITH 18BIT UNIVERSAL BUS TRANSCEIVERS SCBS668C − JULY 1996 − REVISED JUNE 2004 5 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 Terminal Functions TERMINAL NAME DESCRIPTION 1A1−1A9, 2A1−2A9 Normal-function A-bus I/O ports. See function table for normal-mode logic. 1B1−1B9, 2B1−2B9 Normal-function B-bus I/O ports. See function table for normal-mode logic. 1CLKAB, 1CLKBA, 2CLKAB, 2CLKBA Normal-function clock inputs. See function table for normal-mode logic. GND Ground 1LEAB, 1LEBA, 2LEAB, 2LEBA Normal-function latch enables. See function table for normal-mode logic. 1OEAB, 1OEBA, 2OEAB, 2OEBA Normal-function output enables. See function table for normal-mode logic. An internal pullup at each terminal forces the terminal to a high level if left unconnected. TCK Test clock. One of four terminals required by IEEE Standard 1149.1-1990. Test operations of the device are synchronous to TCK. Data is captured on the rising edge of TCK and outputs change on the falling edge of TCK. TDI Test data input. One of four terminals required by IEEE Standard 1149.1-1990. TDI is the serial input for shifting data through the instruction register or selected data register. An internal pullup forces TDI to a high level if left unconnected. TDO Test data output. One of four terminals required by IEEE Standard 1149.1-1990. TDO is the serial output for shifting data through the instruction register or selected data register. TMS Test mode select. One of four terminals required by IEEE Standard 1149.1-1990. TMS directs the device through its TAP controller states. An internal pullup forces TMS to a high level if left unconnected. VCC Supply voltage |
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