CAT9555WI datasheet(1/17 Pages) ONSEMI

Part #	CAT9555WI

Description	16-bit I짼C and SMBus I/O Port with Interrupt

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CAT9555

1

Doc. No. MD-9003, Rev. I

Characteristics subject to change without notice

16-bit I²C and SMBus I/O Port with Interrupt

FEATURES

400kHz I²C bus compatible

2.3V to 5.5V operation

Low stand-by current

5V tolerant I/Os

16 I/O pins that default to inputs at power-up

High drive capability

Individual I/O configuration

Polarity inversion register

Active low interrupt output

Internal power-on reset

No glitch on power-up

Noise filter on SDA/SCL inputs

Cascadable up to 8 devices

Industrial temperature range

RoHS-compliant 24-lead SOIC and TSSOP, and

24-pad TQFN (4 x 4mm) packages

APPLICATIONS

White goods (dishwashers, washing machines)

Handheld devices (cell phones, PDAs, digital

cameras)

Data Communications (routers, hubs and servers)

DESCRIPTION

The CAT9555 is a CMOS device that provides 16-bit

parallel input/output port expansion for I²C and SMBus

compatible applications. These I/O expanders provide

a simple solution in applications where additional I/Os

are

needed:

sensors,

power

switches,

LEDs,

pushbuttons, and fans.

The CAT9555 consists of two 8-bit Configuration ports

(input or output), Input, Output and Polarity inversion

registers, and an I²C/SMBus-compatible serial interface.

Any of the sixteen I/Os can be configured as an input

or output by writing to the configuration register. The

system master can invert the CAT9555 input data by

writing to the active-high polarity inversion register.

The CAT9555 features an active low interrupt output

which indicates to the system master that an input

state has changed.

The three address input pins provide the device's

extended addressing capability and allow up to eight

devices to share the same bus. The fixed part of the

I²C slave address is the same as the CAT9554,

allowing up to eight of these devices in any

combination to be connected on the same bus.

For Ordering Information details, see page 16.

BLOCK DIAGRAM

(1)

Notes:

(1)

All I/Os are set to inputs at RESET

VINT

INT

8-BIT

WRITE pulse

READ pulse

LP FILTER

POWER-ON

RESET

INPUT

FILTER

I2C/SMBUS

CONTROL

A0

A1

A2

SDA

SCL

VCC

VSS

INPUT/

OUTPUT

PORTS

I/O1.0

I/O1.1

I/O1.2

I/O1.3

I/O1.4

I/O1.5

I/O1.6

I/O1.7

8-BIT

WRITE pulse

READ pulse

INPUT/

OUTPUT

PORTS

I/O0.0

I/O0.1

I/O0.2

I/O0.3

I/O0.4

I/O0.5

I/O0.6

I/O0.7

Similar Part No. - CAT9555WI

Manufacturer	Part #	Datasheet	Description
Catalyst Semiconductor	CAT9555WI	235Kb / 17P	16-bit I2C and SMBus I/O Port with Interrupt
ON Semiconductor	CAT9555WI	389Kb / 18P	16-bit I짼C and SMBus I/O Port with Interrupt Doc. No. MD-9003, Rev. J
ON Semiconductor	CAT9555WI	176Kb / 16P	16-bit I2C and SMBus I/O Port with Interrupt June, 2011 ??Rev. 11
Catalyst Semiconductor	CAT9555WI-T1	212Kb / 17P	16-bit I2C and SMBus I/O Port with Interrupt
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Similar Description - CAT9555WI

Manufacturer	Part #	Datasheet	Description
ON Semiconductor	CAT9555	389Kb / 18P	16-bit I짼C and SMBus I/O Port with Interrupt Doc. No. MD-9003, Rev. J
	CAT9534	172Kb / 16P	8-bit I짼C and SMBus I/O Port with Interrupt Doc. No. MD-9004 Rev. D
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Catalyst Semiconductor	CAT9555	212Kb / 17P	16-bit I2C and SMBus I/O Port with Interrupt
NXP Semiconductors	PCA9555	185Kb / 22P	16-bit I2C and SMBus I/O port with interrupt 2004 Sep 30
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NXP Semiconductors	PCA9555	583Kb / 34P	16-bit I2C-bus and SMBus I/O port with interrupt Rev. 08-22 October 2009

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