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SN65LVDS104 Datasheet(PDF) 4 Page - Texas Instruments

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Part # SN65LVDS104
Description  4-PORT LVDS AND 4-PORT TTL-TO-LVDS REPEATERS
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

SN65LVDS104 Datasheet(HTML) 4 Page - Texas Instruments

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SN65LVDS104 ELECTRICAL CHARACTERISTICS
SN65LVDS104 SWITCHING CHARACTERISTICS
SN65LVDS104
SN65LVDS105
SLLS396F – SEPTEMBER 1999 – REVISED JANUARY 2005
over recommended operating conditions (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP(1)
MAX UNIT
VIT+
Positive-going differential input voltage threshold
100
See Figure 1 and Table 1
mV
VIT-
Negative-going differential input voltage threshold
–100
|VOD|
Differential output voltage magnitude
247
340
454
RL = 100 Ω, VID = ± 100 mV,
mV
Change in differential output voltage magnitude between logic
See Figure 1 and Figure 2
∆|V
OD|
–50
50
states
VOC(SS)
Steady-state common-mode output voltage
1.125
1.375
V
Change in steady-state common-mode output voltage be-
∆V
OC(SS)
See Figure 3
–50
50
mV
tween logic states
VOC(PP)
Peak-to-peak common-mode output voltage
25
150
mV
Enabled, RL = 100 Ω
23
35
mA
ICC
Supply current
Disabled
3
8
mA
VI = 0 V
–2
–11
–20
II
Input current (A or B inputs)
µA
VI = 2.4 V
–1.2
–3
II(OFF)
Power-off Input current
VCC = 1.5 V, VI = 2.4 V
20
µA
IIH
High-level input current (enables)
VIH = 2 V
20
µA
IIL
Low-level input current (enables)
VIL = 0.8 V
10
µA
VOY or VOZ = 0 V
±10 mA
IOS
Short-circuit output current
VOD = 0 V
±10 mA
IOZ
High-impedance output current
VO = 0 V or 2.4 V
±1
µA
IO(OFF)
Power-off output current
VCC = 1.5 V, VO = 2.4 V
±1
µA
CIN
Input capacitance (A or B inputs)
VI = 0.4 sin (4E6πt) + 0.5 V
3
pF
VI = 0.4 sin (4E6πt) + 0.5 V,
CO
Output capacitance (Y or Z outputs)
9.4
pF
Disabled
(1)
All typical values are at 25
°C and with a 3.3-V supply.
over recommended operating conditions (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP(1)
MAX UNIT
tPLH
Propagation delay time, low-to-high-level output
2.4
3.2
4.2
ns
tPHL
Propagation delay time, high-to-low-level output
2.2
3.1
4.2
ns
tr
Differential output signal rise time
0.3
0.8
1.2
ns
RL = 100 Ω, CL = 10 pF,
See Figure 4
tf
Differential output signal fall time
0.3
0.8
1.2
ns
tsk(p)
Pulse skew (|tPHL - tPLH|)
150
500
ps
tsk(o)
Channel-to-channel output skew(2)
20
100
ps
tsk(pp)
Part-to-part skew(3)
1.5
ns
tPZH
Propagation delay time, high-impedance-to-high-level output
7.2
15
ns
tPZL
Propagation delay time, high-impedance-to-low-level output
8.4
15
ns
See Figure 5
tPHZ
Propagation delay time, high-level-to-high-impedance output
3.6
15
ns
tPLZ
Propagation delay time, low-level-to-high-impedance output
6
15
ns
(1)
All typical values are at 25
°C and with a 3.3-V supply.
(2)
tsk(o) is the magnitude of the time difference between the tPLH or tPHL of all drivers of a single device with all of their inputs connected
together.
(3)
tsk(pp) is the magnitude of the difference in propagation delay times between any specified terminals of two devices when both devices
operate with the same supply voltages, at the same temperature, and have identical packages and test circuits.
4


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