3

Ai329

Bias Condition

DC Characteristics

Parameter

Symbol

Min.

Typ.

Max.

Unit

Output amplifier drain current

-

3

-

㎃

Driving Condition

Parameter

Symbol

Min.

Typ.

Max.

Unit

Vertical clock high voltage

Φ

14.5

15.0

15.5

V

Vertical clock middle voltage

Φ

-0.2

0.0

0.2

Vertical clock low voltage

-9.0

-8.5

-8.0

Horizontal clock high voltage

4.5

5.0

5.5

Horizontal clock low voltage

-0.5

0.0

0.5

RG clock voltage difference

4.7

5.0

5.3

Substrate clock voltage

23

24

25

Φ

Φ

Φ

Φ

Φ

V

V

V

V

V

V

Parameter

Symbol Min.

Typ.

Max.

Unit

Output amplifier drain voltage

14.5

15.0

15.5

V

Output amplifier gate voltage

1.5

2.0

2.5

V

Output amplifier source voltage

Ground through

680Ω Resistor, ±5%

Substrate voltage adjustment range

15

V

Fluctuation range after substrate voltage adjustment

V

Protection bias

Set to low level

of vertical transfer clock

Remark

Reset gate clock voltage adjustment range

V

%

5

1

-1

3

-3

4

0