SN65LVDS93

LVDS SERDES TRANSMITTER

SLLS302F – MAY 1998 – REVISED FEBRUARY 2000

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POST OFFICE BOX 655303

1.82 Gigabits per Second Throughput

Communication With Very Low EMI

Low-Voltage TTL and 4 Data Channels Plus

Clock Out Low-Voltage Differential

Triggered Inputs

250 mW (Typ)

Package With 20 Mil Terminal Pitch

20 MHz to 65 MHz

of ANSI EIA/TIA-644 Standard

description

The SN65LVDS93 LVDS serdes (serializer/des-

erializer) transmitter contains four 7-bit parallel-

load

serial-out

shift

registers,

a

7

× clock

synthesizer, and five low-voltage differential signaling (LVDS) drivers in a single integrated circuit. These

functions allow 28 bits of single-ended LVTTL data to be synchronously transmitted over five balanced-pair

conductors for receipt by a compatible receiver, such as the SN65LVDS94.

When transmitting, data bits D0 through D27 are each loaded into registers upon the edge of the input clock

signal (CLKIN). The rising or falling edge of the clock can be selected via the clock select (CLKSEL) pin. The

frequency of CLKIN is multiplied seven times and then used to serially unload the data registers in 7-bit slices.

The four serial streams and a phase-locked clock (CLKOUT) are then output to LVDS output drivers. The

frequency of CLKOUT is the same as the input clock, CLKIN.

The SN65LVDS93 requires no external components and little or no control. The data bus appears the same

at the input to the transmitter and output of the receiver with the data transmission transparent to the user(s).

The only user intervention is selecting a clock rising edge by inputting a high level to CLKSEL or a falling edge

with a low-level input and the possible use of the shutdown/clear (SHTDN). SHTDN is an active-low input to

inhibit the clock and shut off the LVDS output drivers for lower power consumption. A low level on this signal

clears all internal registers at a low level.

The SN65LVDS93 is characterized for operation over ambient air temperatures of – 40

°C to 85°C.

Copyright

© 2000, Texas Instruments Incorporated

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

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D5

D6

D7

GND

D8

D9

D10

D11

D12

D13

GND

D14

D15

D16

CLKSEL

D17

D18

D19

GND

D20

D21

D22

D23

D24

D25

D4

D3

D2

GND

D1

D0

D27

LVDSGND

Y1M

Y1P

Y2M

Y2P

LVDSGND

Y3M

Y3P

CLKOUTM

CLKOUTP

Y4M

Y4P

LVDSGND

PLLGND

PLLGND

SHTDN

CLKIN

D26

GND

DGG PACKAGE

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