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IMP1232LP Datasheet(PDF) 6 Page - A1 PROs co., Ltd. |
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IMP1232LP Datasheet(HTML) 6 Page - A1 PROs co., Ltd. |
6 / 7 page 4 408-432-9100/www.impweb.com © 1999 IMP, Inc. IMP1 IMP1881100 Application Information Operation – Power Monitor The DS1810 detects out-of-tolerance power supply conditions. It resets a processor during power-up, power-down and issues a reset to the system processor when the monitored power supply voltage is below the reset threshold. When an out-of-tolerance VCC voltage is detected, the RESET signal is asserted. On power-up, RESET is kept active (LOW) for approximately 150ms after the power supply voltage has reached the selected tolerance. This allows the power supply and microprocessor to stabilize before RESET is released. Output Conditions The IMP1810 active LOW reset signal is valid as long as VCC remains above 1.2V. The RESET output on the IMP1810 uses a push-pull drive stage that can maintain a valid output below 1.2V. To sink current with VCC below 1.2V, a resistor can be connected from the reset pin (RESET) to Ground (see Figure 1). This config- uration will give a valid value on the RESET output with VCC approaching 0V. During both power up and down, this configu- ration will draw current when RESET is in the high state. A value of 100k Ω should be adequate to maintain a valid condition. IMP1810 Microprocessor RESET 100k RESET 1810_06.eps Figure 1. RESET Valid to 0V VCC Figure 2. Timing Diagram: Power-Up Figure 3. Timing Diagram: Power-Down VCCTP (MAX) VCCTP VCCTP (MIN) VCC RESET tR tRPU VOH 1810_07.eps VCCTP (MAX) VCCTP VCCTP (MIN) VCC RESET tF VOL tRPD 1810_08.eps |
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