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IMP8980DC Datasheet(PDF) 9 Page - A1 PROs co., Ltd. |
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IMP8980DC Datasheet(HTML) 9 Page - A1 PROs co., Ltd. |
9 / 14 page 9 †† Timing is over recommended temperature & power supply voltages. ‡ Typical figures are at 25 °C and are for design aid only: not guaranteed and not subject to production testing. * Contents of Connection Memory are not lost if the clock stops, however, ST-BUS outputs go into the high impedance state. NB: Frame Pulse is repeated every 512 cycles of C4i . AC Electrical Characteristics † - Clock Timing (Figures 12 and 13) Characteristics Sym Min Typ ‡ Max Units Test Conditions 1 Clock Period* tCLK 220 244 300 ns 2 Clock Width High tCH 95 122 150 ns 3 Clock Width Low tCL 110 122 150 ns 4 Clock Transition Time tCTT 20 ns 5 Frame Pulse Setup TIme tCCT 20 ns 6 Frame Pulse Hold Time tFPH 0.020 670 µs 7 Frame Pulse Width tFPW 244 ns C4i FOi Bit Cells Channel 31 Bit 0 Channel 0 Bit 7 tCLK tCL tCTT tCTT tCHL tCH tFPH tFPS tFPH tFPS tFPW C4i F0i 2.0V 0.8V 2.0V 0.8V Figure 12 Frame Allignment Figure 13 Clock Timing |
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