SN74ALVCH32501

36-BIT UNIVERSAL BUS TRANSCEIVER

WITH 3-STATE OUTPUTS

SCES144C – OCTOBER 1998 – REVISED MAY 2000

7

POST OFFICE BOX 655303

timing requirements over recommended operating free-air temperature range (unless otherwise

noted) (see Figures 1 through 3)

VCC = 1.8 V

VCC = 2.5 V

± 0.2 V

VCC = 2.7 V

VCC = 3.3 V

± 0.3 V

UNIT

MIN

MAX

MIN

MAX

MIN

MAX

MIN

MAX

fclock

Clock frequency

†

150

150

150

MHz

t

Pulse

LE high

†

3.3

3.3

3.3

ns

tw

duration

CLK high or low

†

3.3

3.3

3.3

ns

Data before CLK

↑

†

2.2

2.1

1.7

tsu

Setup time

Data before LE

↓

CLK high

†

1.9

1.6

1.5

ns

Data before LE

↓

CLK low

†

1.3

1.1

1

th

Hold time

Data after CLK

↑

†

0.6

0.6

0.7

ns

th

Hold time

Data after LE

↓

CLK high or low

†

1.4

1.7

1.4

ns

† This information was not available at the time of publication.

switching characteristics over recommended operating free-air temperature range (unless

otherwise noted) (see Figures 1 through 3)

PARAMETER

FROM

(INPUT)

TO

(OUTPUT)

VCC = 1.8 V

VCC = 2.5 V

± 0.2 V

VCC = 2.7 V

VCC = 3.3 V

± 0.3 V

UNIT

(INPUT)

(OUTPUT)

MIN

TYP

MIN

MAX

MIN

MAX

MIN

MAX

fmax

†

150

150

150

MHz

A or B

B or A

†

1

4.8

4.5

1

3.9

tpd

LE

AorB

†

1.1

5.7

5.3

1.3

4.6

ns

CLK

A or B

†

1.2

6.1

5.6

1.4

4.9

ten

OEAB

B

†

1

5.8

5.3

1

4.6

ns

tdis

OEAB

B

†

1.5

6.2

5.7

1.4

5

ns

ten

OEBA

A

†

1.3

6.3

6

1.1

5

ns

tdis

OEBA

A

†

1.3

5.3

4.6

1.3

4.2

ns

† This information was not available at the time of publication.

PARAMETER

TEST CONDITIONS

VCC = 1.8 V VCC = 2.5 V VCC = 3.3 V

UNIT

PARAMETER

TEST CONDITIONS

TYP

TYP

TYP

UNIT

C d

Power dissipation

Outputs enabled

CL =0

f=10MHz

†

44

54

pF

Cpd

capacitance

Outputs disabled

CL = 0,

f = 10 MHz

†

6

6

pF

† This information was not available at the time of publication.