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SN74LVT16835DL Datasheet(PDF) 1 Page - Texas Instruments |
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SN74LVT16835DL Datasheet(HTML) 1 Page - Texas Instruments |
1 / 7 page SN74LVT16835 3.3-V ABT 18-BIT UNIVERSAL BUS DRIVER WITH 3-STATE OUTPUTS SCBS309D – MARCH 1994 – REVISED NOVEMBER 1996 1 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 D State-of-the-Art Advanced BiCMOS Technology (ABT) Design for 3.3-V Operation and Low-Static Power Dissipation D Member of the Texas Instruments Widebus ™ Family D Supports Mixed-Mode Signal Operation (5-V Input and Output Voltages With 3.3-V VCC) D Supports Unregulated Battery Operation Down to 2.7 V D Typical VOLP (Output Ground Bounce) < 0.8 V at VCC = 3.3 V, TA = 25°C D Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors D Supports Live Insertion D Distributed VCC and GND Pin Configuration Minimizes High-Speed Switching Noise D Flow-Through Architecture Optimizes PCB Layout D Package Options Include Plastic 300-mil Shrink Small-Outline (DL) and Thin Shrink Small-Outline (DGG) Packages Using 25-mil Center-to-Center Spacings description The SN74LVT16835 is an 18-bit universal bus driver designed for low-voltage (3.3-V) VCC operation, but with the capability to provide a TTL interface to a 5-V system environment. Data flow from A to Y is controlled by the output-enable (OE) input. This device operates in the transparent mode when the latch-enable (LE) input is high. The A data is latched if the clock (CLK) input is held at a high or low logic level. If LE is low, the A-bus data is stored in the latch/flip-flop on the low-to-high transition of the clock. When OE is high, the outputs are in the high-impedance state. Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. The SN74LVT16835 is available in TI’s shrink small-outline (DL) and thin shrink small-outline (DGG) packages, which provide twice the input/output (I/O) pins and functionality of standard small-outline packages in the same printed circuit board area. The SN74LVT16835 is characterized for operation from –40 °C to 85°C. Copyright © 1996, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Widebus is a trademark of Texas Instruments Incorporated. Widebus is a trademark of Texas Instruments Incorporated. DGG OR DL PACKAGE (TOP VIEW) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 NC NC Y1 GND Y2 Y3 VCC Y4 Y5 Y6 GND Y7 Y8 Y9 Y10 Y11 Y12 GND Y13 Y14 Y15 VCC Y16 Y17 GND Y18 OE LE GND NC A1 GND A2 A3 VCC A4 A5 A6 GND A7 A8 A9 A10 A11 A12 GND A13 A14 A15 VCC A16 A17 GND A18 CLK GND NC – No internal connection Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. |
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