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SN75ALS197D Datasheet(PDF) 1 Page - Texas Instruments |
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SN75ALS197D Datasheet(HTML) 1 Page - Texas Instruments |
1 / 12 page SN75ALS197 QUADRUPLE DIFFERENTIAL LINE RECEIVER SLLS045B – JANUARY 1989 – REVISED MAY 1995 1 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 D Meets or Exceeds the Requirements of ITU Recommendations V.10, V.11, X.26, and X.27 D Designed for Multipoint Bus Transmission on Long Bus Lines in Noisy Environments D Designed to Operate Up to 20 Mbaud D 3-State Outputs D Common-Mode Input Voltage Range – 7 V to 7 V D Input Sensitivity... ±300 mV D Input Hysteresis... 120 mV Typ D High-Input Impedance...12 kΩ Min D Operates from Single 5-V Supply D Low Supply-Current Requirement 35 mA Max D Improved Speed and Power Consumption Compared to AM26LS32A description The SN75ALSI97 is a monolithic, quadruple line receiver with 3-state outputs designed using advanced, low-power, Schottky technology. This technology provides combined improvements in bar design, tooling production, and wafer fabrication. This, in turn, provides significantly lower power requirements and permits much higher data throughput than other designs. The device meets the specifications of ITU Recommendations V.10, V.11, X.26, and X.27. It features 3-state outputs that permit direct connection to a bus-organized system with a fail-safe design that ensures the outputs will always be high if the inputs are open. The device is optimized for balanced, multipoint bus transmission at rates up to 20 megabits per second. The input features high-input impedance, input hysteresis for increased noise immunity, and an input sensitivity of ±300 mV over a common-mode input voltage range of –7 V to 7 V. It also features active-high and active-low enable functions that are common to the four channels. The SN75ALS197 is designed for optimum performance when used with the SN75ALS192 quadruple differential line driver. The SN75ALS197 is characterized for operation from 0 °C to 70°C. FUNCTION TABLE (each receiver) DIFFERENTIAL INPUTS ENABLES OUTPUT A–B G G Y VID ≥ 0.3 V H X X L H H – 0.3 V < VID < 0.3 V H X X L ? ? VID ≤ – 0.3 V H X X L L L X L HZ Open H X X L H H H = high level, L = low level, X = irrelevant, ? = indeterminate, Z = high impedance (off) Copyright © 1995, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. D OR N PACKAGE (TOP VIEW) 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 1B 1A 1Y G 2Y 2A 2B GND VCC 4B 4A 4Y G 3Y 3A 3B |
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