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TCM29C16DWR Datasheet(PDF) 4 Page - Texas Instruments |
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TCM29C16DWR Datasheet(HTML) 4 Page - Texas Instruments |
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4 / 25 page  TCM29C13, TCM29C14, TCM29C16, TCM29C17, TCM129C13, TCM129C14, TCM129C16, TCM129C17 COMBINED SINGLE-CHIP PCM CODEC AND FILTER SCTS011H – APRIL 1986 – REVISED JULY 1996 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 Terminal Functions TERMINAL NO. NAME TCM29C13 TCM129C13 TCM29C14 TCM129C14 TCM29C16 TCM29C17 TCM129C16 TCM129C17 I/O DESCRIPTION PDN 5 5 4 I Power-down select. The device is inactive with a TTL low-level input to this terminal and active with a TTL high-level input to the terminal. PWRO + 2 2 2 O Noninverting output of power amplifier. Can drive transformer hybrids or high-impedance loads directly in either a differential or a single-ended configuration PWRO – 3 3 3 O Inverting output of power amplifier. Functionally identical with and complementary to PWRO +. SIGR 8 O Signaling bit output, receive channel. In a fixed-data-rate mode, outputs the logical state of the 8th bit (LSB) of the PCM word in the most recent signaling frame. SIGX/ASEL 15 18 I A-law and µ-law operation select. When connected to VBB, A-law is selected. When connected to VCC or GND, µ-law is selected. When not connected to VBB, a TTL-level input is transmitted as the eighth bit (LBS) of the PCM word during signaling frames on PCM OUT (TCM29C14 and TCM129C14 only). SIGX/ASEL is internally connected to provide µ-law operational for TCM29C16 and TCM129C16 and A-law operation for TCM29C17 and TCM129C17. TSX/DCLKX 14 17 12 I/O Transmit channel time-slot strobe (output) or data clock (input) for the transmit channel. In the fixed-data-rate mode, this terminal is an open-drain output to be used as an enable signal for a 3-state output buffer. In the variable-data rate mode, DCLKX becomes the transmit data clock, which operates at TTL level from 64 kHz to 2.048 MHz. VBB 1 1 1 Most negative supply voltage. Input is – 5 V ±5%. VCC 20 24 16 Most positive supply voltage. Input is 5 V ±5% |
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