THS5641A

8-BIT, 100 MSPS, CommsDAC

™

DIGITAL-TO-ANALOG CONVERTER

SLAS277 –MARCH 2000

4

POST OFFICE BOX 655303

dc specifications

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

Resolution

8

Bits

DC accuracy†

INL

Integral nonlinearity

TA =40°Cto85°C

–0.25

±0.1

0.25

LSB

DNL

Differential nonlinearity

TA = –40°C to 85°C

–0.25

±0.05

0.25

LSB

Monotonicity

Monotonic

Analog output

Offset error

0.02

%FSR

Gain error

Without internal reference

2.3

%FSR

Gain error

With internal reference

1.3

%FSR

Full scale output current‡

2

20

mA

Output compliance range

AVDD = 5 V,

IOUTFS = 20 mA

–1

1.25

V

Output compliance range

AVDD = 3.3 V IOUTFS = 20 mA

–1

0.6

V

Output resistance

300

k

Ω

Output capacitance

5

pF

Reference output

Reference voltage

1.18

1.22

1.32

V

Reference output current§

100

nA

Reference input

VEXTIO

Input voltage range

0.1

1.25

V

Input resistance

1

M

Ω

Small signal bandwidth¶

Without CCOMP1

1.3

MHz

Input capacitance

100

pF

Temperature coefficients

Offset drift

0

Gain drift

Without internal reference

±40

ppm of

Gain drift

With internal reference

±120

FSR/

°C

Reference voltage drift

±35

Power supply

AVDD

Analog supply voltage

3

5.5

V

DVDD

Digital supply voltage

3

5.5

V

IAVDD

Analog supply current

25

30

mA

IAVDD

Sleep mode supply current

Sleep mode

3

5

mA

IDVDD

Digital supply current#

5

6

mA

AVDD = 5 V, DVDD = 5 V

IOUTFS = 20 mA

175

mW

AVDD = 3.3 V, DVDD = 3.3 V, IOUTFS = 20 mA

100

mW

AVDD

Power supply rejection ratio

±0.4

%FSR/V

DVDD

Power supply rejection ratio

±0.025

%FSR/V

Operating range

–40

85

°C

† Measured at IOUT1 in virtual ground configuration.

‡ Nominal full-scale current IOUTFS equals 32X the IBIAS current.

§ Use an external buffer amplifier with high impedance input to drive any external load.

¶ Reference bandwidth is a function of external cap at COMP1 pin and signal level.

# Measured at fCLK = 50 MSPS and fOUT= 1 MHz.

|| Measured for 50

Ω RLOAD at IOUT1 and IOUT2, fCLK = 50 MSPS and fOUT = 20 MHz.

Specifications subject to change