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THS5641AIDW Datasheet(PDF) 1 Page - Texas Instruments |
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THS5641AIDW Datasheet(HTML) 1 Page - Texas Instruments |
1 / 28 page THS5641A 8-BIT, 100 MSPS, CommsDAC ™ DIGITAL-TO-ANALOG CONVERTER SLAS277 –MARCH 2000 1 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 D Member of the Pin-Compatible CommsDAC ™ Product Family D 100 MSPS Update Rate D 8-Bit Resolution D Signal-to-Noise and Distortion Ratio (SINAD) at 5 MHz: 50 dB D Integral Nonlinearity INL: 0.25 LSB D Differential Nonlinearity DNL: 0.25 LSB D 1 ns Setup/Hold Time D Glitch Energy: 5 pV-s D Settling Time to 0.1%: 35 ns D Differential Scalable Current Outputs: 2 mA to 20 mA D On-Chip 1.2-V Reference D 3-V and 5-V Single Supply Operation D Straight Binary or Twos Complement Input D Power Dissipation: 100 mW at 3.3 V, Sleep Mode: 17 mW at 3.3 V D Package: 28-Pin SOIC and TSSOP description The THS5641A is an 8-bit resolution digital-to-analog converter (DAC) optimized for video applications and digital data transmission in wired and wireless communication systems. The 8-bit DAC is a member of the CommsDAC ™ series of high-speed, low-power CMOS digital-to-analog converters. The CommsDAC™ family consists of pin compatible 14-, 12-, 10-, and 8-bit DACs. All devices offer identical interface options, small outline package and pinout. The THS5641A offers superior ac and dc performance while supporting update rates up to 100 MSPS. The THS5641A operates from an analog and digital supply of 3 V to 5.5 V. Its inherent low power dissipation of 100 mW ensures that the device is well suited for portable and low power applications. Lowering the full-scale current output reduces the power dissipation without significantly degrading performance. The device features a SLEEP mode, which reduces the standby power to approximately 17 mW, thereby optimizing the power consumption for system needs. The THS5641A is manufactured in Texas Instruments advanced high-speed mixed-signal CMOS process. A current-source-array architecture combined with simultaneous switching shows excellent dynamic performance. On-chip edge-triggered input latches and a 1.2 V temperature compensated bandgap reference provide a complete monolithic DAC solution. The digital supply range of 3 V to 5.5 V supports 3 V and 5 V CMOS logic families. Minimum data input setup and hold times allow for easy interfacing with external logic. The THS5641A supports both a straight binary and twos complement input word format, enabling flexible interfacing with digital signal processors. Copyright © 2000, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 D7 D6 D5 D4 D3 D2 D1 D0 NC NC NC NC NC NC CLK DVDD DGND MODE AVDD COMP2 IOUT1 IOUT2 AGND COMP1 BIASJ EXTIO EXTLO SLEEP SOIC (DW) OR TSSOP (PW) PACKAGE (TOP VIEW) NC – No internal connection CommsDAC is a trademark of Texas Instruments. |
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