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MQFL-270-09S Datasheet(PDF) 10 Page - SynQor Worldwide Headquarters

Part # MQFL-270-09S
Description  HIGH RELIABILITY DC-DC CONVERTER
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Manufacturer  SYNQOR [SynQor Worldwide Headquarters]
Direct Link  http://www.synqor.com
Logo SYNQOR - SynQor Worldwide Headquarters

MQFL-270-09S Datasheet(HTML) 10 Page - SynQor Worldwide Headquarters

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Product # MQFL-270-09S
Phone 1-888-567-9596
www.synqor.com
Doc.# 005-0005057 Rev. A
05/29/09
Page 10
Output:
Current:
9.0 V
13 A
MQFL-270-09S
Technical Specification
Refer to the following Current Limit section for details regarding
persistent current limit behavior.
REMOTE SENSE: The purpose of the remote sense pins is to
correct for the voltage drop along the conductors that connect the
converter’s output to the load. To achieve this goal, a separate
conductor should be used to connect the +SENSE pin (pin 10)
directly to the positive terminal of the load, as shown in the con-
nection diagram. Similarly, the –SENSE pin (pin 9) should be
connected through a separate conductor to the return terminal of
the load.
NOTE: Even if remote sensing of the load voltage is not desired,
the +SENSE and the -SENSE pins must be connected to +Vout (pin
7) and OUTPUT RETURN (pin 8), respectively, to get proper regu-
lation of the converter’s output. If they are left open, the converter
will have an output voltage that is approximately 200mV higher
than its specified value. If only the +SENSE pin is left open, the
output voltage will be approximately 25mV too high.
Inside the converter, +SENSE is connected to +Vout with a 100W
resistor and –SENSE is connected to OUTPUT RETURN with a
10W resistor.
It is also important to note that when remote sense is used, the
voltage across the converter’s output terminals (pins 7 and 8)
will be higher than the converter’s nominal output voltage due to
resistive drops along the connecting wires. This higher voltage at
the terminals produces a greater voltage stress on the converter’s
internal components and may cause the converter to fail to deliver
the desired output voltage at the low end of the input voltage
range at the higher end of the load current and temperature
range. Please consult the factory for details.
SYNCHRONIZATION: The MQFL converter’s switching fre-
quency can be synchronized to an external frequency source
that is in the 500 kHz to 700 kHz range. A pulse train at the
desired frequency should be applied to the SYNC IN pin (pin 6)
with respect to the INPUT RETURN (pin 2). This pulse train should
have a duty cycle in the 20% to 80% range. Its low value should
be below 0.8V to be guaranteed to be interpreted as a logic low,
and its high value should be above 2.0V to be guaranteed to be
interpreted as a logic high. The transition time between the two
states should be less than 300ns.
If the MQFL converter is not to be synchronized, the SYNC IN pin
should be left open circuit. The converter will then operate in its
free-running mode at a frequency of approximately 550 kHz.
If, due to a fault, the SYNC IN pin is held in either a logic low or
logic high state continuously, the MQFL converter will revert to its
free-running frequency.
The MQFL converter also has a SYNC OUT pin (pin 5). This
output can be used to drive the SYNC IN pins of as many as ten
(10) other MQFL converters. The pulse train coming out of SYNC
OUT has a duty cycle of 50% and a frequency that matches the
switching frequency of the converter with which it is associated.
This frequency is either the free-running frequency if there is no
synchronization signal at the SYNC IN pin, or the synchronization
frequency if there is.
The SYNC OUT signal is available only when the DC input volt-
age is above approximately 125V and when the converter is not
inhibited through the ENA1 pin. An inhibit through the ENA2 pin
will not turn the SYNC OUT signal off.
NOTE: An MQFL converter that has its SYNC IN pin driven by
the SYNC OUT pin of a second MQFL converter will have its start
of its switching cycle delayed approximately 180 degrees relative
to that of the second converter.
Figure B shows the equivalent circuit looking into the SYNC IN pin.
Figure C shows the equivalent circuit looking into the SYNC OUT pin.
CURRENT SHARE: When several MQFL converters are placed
in parallel to achieve either a higher total load power or N+1
redundancy, their SHARE pins (pin 11) should be connected
together. The voltage on this common SHARE node represents
the average current delivered by all of the paralleled converters.
Each converter monitors this average value and adjusts itself so
that its output current closely matches that of the average.
Figure B: Equivalent circuit looking into the SYNC IN pin with
respect to the IN RTN (input return) pin.
PIN 2
PIN 6
5K
5V
SYNC IN
IN RTN
TO SYNC
CIRCUITRY
5K
Figure C: Equivalent circuit looking into SYNC OUT pin with
respect to the IN RTN (input return) pin.
FROM SYNC
CIRCUITRY
5K
5V
SYNC OUT
IN RTN
PIN 2
PIN 5
OPEN COLLECTOR
OUTPUT


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