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TLC7628IFN Datasheet(PDF) 8 Page - Texas Instruments

Part # TLC7628IFN
Description  DUAL 8-BIT MULTIPLYING DIGITAL-TO-ANALOG CONVERTERS
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

TLC7628IFN Datasheet(HTML) 8 Page - Texas Instruments

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TLC7628C, TLC7628E, TLC7628I
DUAL 8-BIT MULTIPLYING
DIGITAL-TO-ANALOG CONVERTERS
SLAS063A – APRIL 1989 – REVISED MAY 1995
8
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
PRINCIPLES OF OPERATION
These devices contain two, identical, 8-bit, multiplying DACs: DACA and DACB. Each DAC consists of an
inverted R-2R ladder, analog switches, and input data latches. Binary-weighted currents are switched between
the DAC output and AGND, thus maintaining a constant current in each ladder leg independent of the switch
state. Most applications require only the addition of an external operational amplifier and voltage reference. A
simplified D/A circuit for DACA or DACB with all digital inputs low is shown in Figure 7.
Figure 8 shows the DACA or DACB equivalent circuit. Both DACs share the analog ground terminal 1 (AGND).
With all digital inputs high, the reference current flows to OUTA. A small leakage current (IIkg) flows across
internal junctions, and as with most semiconductor devices, doubles every 10
°C. The Co is caused by the
parallel combination of the NMOS switches and has a value that depends on the number of switches connected
to the output. The range of Co is 25 pF to 60 pF maximum. The equivalent output resistance (ro) varies with the
input code from 0.8R to 3R where R is the nominal value of the ladder resistor in the R-2R network.
These devices interface to a microprocessor through the data bus, CS, WR, and DACA/DACB control signals.
When CS and WR are both low, the analog output on these devices, specified by the DACA/DACB control line,
responds to the activity on the DB0–DB7 data bus inputs. In this mode, the input latches are transparent and
input data directly affects the analog output. When either the CS signal or WR signal goes high, the data on the
DB0–DB7 inputs is latched until the CS and WR signals go low again. When CS is high, the data inputs are
disabled, regardless of the state of the WR signal.
The digital inputs of these devices provide TTL compatibility when operated from a supply voltage of 10.8 V to
15.75 V.
DACA Data Latches and Drivers
REF
AGND
OUT
RFB
R
R
R
R
2R
2R
S8
2R
S3
2R
S2
S1
2R
Figure 7. Simplified Functional Circuit for DACA or DACB
R
REF
OUTA
RFB
R
COUT
1/256
Latch A or Latch B Loaded With 11111111
Ilkg
AGND
Figure 8. TLC7628 Equivalent Circuit for DACA or DACB


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