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TLV320AIC11I Datasheet(PDF) 10 Page - Texas Instruments |
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TLV320AIC11I Datasheet(HTML) 10 Page - Texas Instruments |
10 / 55 page 1–4 1.3 Terminal Assignments 14 15 NC NC AVDD2 AVSS NC NC DVDD2 DVSS NC M/S ALTIN DCSI 36 35 34 33 32 31 30 29 28 27 26 25 16 1 2 3 4 5 6 7 8 9 10 11 12 AURXFP AURXM AURXCP DTXOP DTXOM DTXIP DTXIM OUTP OUTM M0 M1 PWRDWN 17 18 19 20 47 46 45 44 43 48 42 40 39 38 41 21 22 23 24 37 13 PFB PACKAGE (TOP VIEW) NOTE: All NC pins should be left unconnected. 1.4 Ordering Information TA PACKAGE TA 48-TQFP PFB 0 °C to 70°C TLV320AIC11C –40 °C to 85°C TLV320AIC11I 1.5 Terminal Functions TERMINAL I/O DESCRIPTION NAME NO. I/O DESCRIPTION ALTIN 26 I Serial input in the event monitor mode AURXCP 3 I Receiver-path/GP amplifier noninverting input. It needs to be connected to AVSS if not used. AURXM 2 I Receiver-path amplifier A1 inverting input, or inverting input to auxiliary analog input. It needs to be connected to AVSS if not used. It can also be used for general-purpose amplification. AURXFP 1 I Receiver-path amplifier A1 feedback, or noninverting input to auxiliary analog input. It needs to be connected to AVSS if not used. It can also be used for general-purpose amplification. AVDD1 AVDD2 45 34 I Analog ADC power supply (3 V to 5.5 V) AVSS 33, 40, 42, 46 I Analog ground DCSI 25 I Direct configuration serial input for directly programming of internal control registers DIN 17 I Data input. DIN receives the DAC input data and register data from the external digital signal processor (DSP), and is synchronized to SCLK and FS. Data is latched at the falling edge of SCLK when FS is low. DIN is at high impedance when FS is not activated. |
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