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TMS320C6202BZNZ250 Datasheet(PDF) 7 Page - Texas Instruments |
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TMS320C6202BZNZ250 Datasheet(HTML) 7 Page - Texas Instruments |
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7 / 86 page  TMS320C6202, TMS320C6202B, TMS320C6203, TMS320C6204 FIXED-POINT DIGITAL SIGNAL PROCESSORS SPRS104A – OCTOBER 1999 – REVISED MARCH 2000 7 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443 functional and CPU block diagram (’C62x devices) Direct Memory Access Controller (DMA) (see Table 1) Test ’C62x CPU Data Path B B Register File Program Access/Cache Controller Instruction Fetch Instruction Dispatch Instruction Decode Data Path A A Register File PLL (see Table 1) Data Access Controller Power- Down Logic .L1 .S1 .M1 .D1 .D2 .M2 .S2 .L2 32 SDRAM or SBSRAM ROM/FLASH SRAM I/O Devices 32 Synchronous FIFOs I/O Devices Timer 0 Timer 1 External Memory Interface (EMIF) Multichannel Buffered Serial Port 0 Multichannel Buffered Serial Port 1 Multichannel Buffered Serial Port 2† Expansion Bus Internal Program Memory (see Table 1) Control Registers Control Logic Internal Data Memory (see Table 1) In-Circuit Emulation Interrupt Control Framing Chips: H.100, MVIP, SCSA, T1, E1 AC97 Devices, SPI Devices, Codecs HOST CONNECTION Master /Slave TI PCI2040 Power PC 683xx 960 ’C6202/’02B/’03/’04 Digital Signal Processors † McBSP2 is not applicable for the ’C6204 device. |
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