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ASM3P623S00EF-16-SR Datasheet(PDF) 4 Page - PulseCore Semiconductor

Part # ASM3P623S00EF-16-SR
Description  Timing-Safe??Peak EMI reduction IC
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Manufacturer  PULSECORE [PulseCore Semiconductor]
Direct Link  http://www.onsemi.com/
Logo PULSECORE - PulseCore Semiconductor

ASM3P623S00EF-16-SR Datasheet(HTML) 4 Page - PulseCore Semiconductor

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May 2007
ASM3P623S00B/C/J/E/F/K
rev 0.4
Timing-Safe™ Peak EMI Reduction IC
4 of 18
Notice: The information in this document is subject to change without notice.
Pin Description for ASM3P623S00J
Pin #
Pin Name
Description
1
XIN/CLKIN
Crystal connection or external reference frequency input. This pin has dual functions. It
can be connected either to an external crystal or an external reference clock.
2
XOUT
Crystal connection. If using an external reference, this pin must be left unconnected.
3
SS%
3
Spread Spectrum Selection
4
GND
Ground
5
SSON
3
Spread Spectrum enable and disable option When SSON is HIGH, the spread
spectrum is enabled and when LOW, it turns off the spread spectrum.
6
CLKOUT
1,2
Buffered clock output
7
VDD
3.3V supply
8
NC
No Connect
Notes:
1. This output is driven and has an internal feedback for the PLL.
2. Weak pull-down on output. 3. Weak pull-up on these inputs. 4. Buffered clock output is Timing-Safe™
Pin Description for ASM3P623S00E/F
Pin #
Pin Name
Description
1
CLKIN
Input reference frequency, 5V tolerant input
2
CLKOUT1
1
Buffered clock output
3
VDD
3.3V supply
4
SS%
2
Spread Spectrum Selection
5
GND
Ground
6
CLKOUT2
1
Buffered clock output
7
CLKOUT3
1
Buffered clock output
8
DLY CNTRL
The pin is used to skew the outputs such that they align with the input. The skew can
is in the range of 100-200pS
9
SSON
3
Spread Spectrum enable and disable option. When SSON is HIGH, the spread
spectrum is enabled and when LOW, it turns off the spread spectrum.
10
CLKOUT4
1
Buffered clock output
11
CLKOUT5
1
Buffered clock output
12
GND
Ground
13
VDD
3.3V supply
14
CLKOUT6
1
Buffered clock output
15
CLKOUT7
1
Buffered clock output
16
CLKOUT
1,3
Buffered clock output
Notes:
1. Weak pull-down on all outputs. 2. Weak pull-up on these inputs.
3. This output is driven and has an internal feedback for the PLL.
4. Buffered clock outputs are Timing-Safe™


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