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ASM3I623S00CF-08-TT Datasheet(PDF) 3 Page - PulseCore Semiconductor |
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ASM3I623S00CF-08-TT Datasheet(HTML) 3 Page - PulseCore Semiconductor |
3 / 18 page May 2007 ASM3P623S00B/C/J/E/F/K rev 0.4 Timing-Safe™ Peak EMI Reduction IC 3 of 18 Notice: The information in this document is subject to change without notice. 10 7 Pin Configuration (16 Pin Devices) Pin Description for ASM3P623S00B/C Pin # Pin Name Description 1 CLKIN Input reference frequency, 5V-tolerant input 2 NC No Connect 3 SS% 3 Spread Spectrum Selection 4 GND Ground 5 SSON 3 Spread Spectrum enable and disable option When SSON is HIGH, the spread spectrum is enabled and when LOW, it turns off the spread spectrum. 6 CLKOUT 1,2 Buffered clock output 7 VDD 3.3V supply 8 NC No Connect Notes: 1. This output is driven and has an internal feedback for the PLL. 2. Weak pull-down on output. 3. Weak pull-up on these inputs. 4. Buffered clock output is Timing-Safe™ 1 2 3 4 13 14 15 16 5 6 7 8 9 11 12 CLKOUT6 CLKOUT7 CLKOUT4 CLKOUT5 VDD CLKOUT GND SSON DLY CNTRL VDD SS% GND CLKOUT2 CLKOUT3 CLKOUT1 CLKIN ASM3P623S00E/F 1 2 3 4 13 14 15 16 5 6 8 9 10 11 12 CLKOUT6 CLKOUT7 CLKOUT4 CLKOUT5 VDD CLKOUT GND SSON CLKOUT3 CLKOUT1 VDD SS% GND CLKOUT2 XOUT XIN/CLKIN ASM3P623S00K |
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