September 2006

PCS2I9942C

rev 0.3

Low Voltage 1:18 Clock Distribution Chip

3 of 10

Notice: The information in this document is subject to change without notice.

Table 2. Pin Configuration

Pin #

Pin Name

I/O

Type

Function

1,2,12,17,25

GND

Supply

Ground

3

LVCMOS_CLK

Input

LVCMOS

LVCMOS Clock Input

4,6

NC

No Connect

5

OE

Input

LVCMOS

Outputs are enabled, when OE is

high and are tri-stated, when OE is

made low.

7,8,16,21,29

VCC

Supply

VCC

Positive power supply

9-11

Q17-Q15

Output

LVCMOS

Clock outputs

13-15

Q14-Q12

Output

LVCMOS

Clock outputs

18-20

Q11-Q9

Output

LVCMOS

Clock outputs

22-24

Q8-Q6

Output

LVCMOS

Clock outputs

26-28

Q5-Q3

Output

LVCMOS

Clock outputs

30-32

Q2-Q0

Output

LVCMOS

Clock outputs

Table 3. Absolute Maximum Rating

1

Symbol

Parameter

Min

Max

Unit

Supply Voltage

-0.3

3.6

V

Input Voltage

-0.3

V

Input Current

mA

Storage Temperature Range

-40

125

°C

Note: 1These are stress ratings only and are not implied for functional use. Exposure to absolute maximum ratings for prolonged periods of time may affect

device reliability.

Symbol

Characteristic

Min

Typ

Max

Unit

Condition

Input HIGH Voltage

2.0

V

Input LOW Voltage

0.8

V

Output HIGH Voltage

2.0

V

Output LOW Voltage

0.5

V

Input Current

±200

µA

Input Capacitance

4.0

pF

Power Dissipation Capacitance

14

pF

Per Output

Output Impedance

12

Ω

Maximum Quiescent Supply Current

0.5

mA