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PCS3P73Z01AWG-08-TR Datasheet(PDF) 1 Page - PulseCore Semiconductor |
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PCS3P73Z01AWG-08-TR Datasheet(HTML) 1 Page - PulseCore Semiconductor |
1 / 13 page May 2008 PCS3P73Z01AW rev 0.3 Notice: The information in this document is subject to change without notice. PulseCore Semiconductor Corporation 1715 S. Bascom Ave Suite 200, Campbell, CA 95008 • Tel: 408-879-9077 • Fax: 408-879-9018 www.pulsecoresemi.com Wide Frequency range Timing-Safe™ Peak EMI reduction IC General Features • 1x , LVCMOS Timing-Safe™ Peak EMI Reduction • Input frequency: 2MHz - 16MHz @ 2.5V 2MHz - 20MHz @ 3.3V • Output frequency ( Timing-Safe™): 2MHz - 16MHz @ 2.5V 2MHz - 20MHz @ 3.3V • Analog Spread Selection up to ±1.5% • External Input-Output Delay Control option • Power Down option for Power Save mode • Supply Voltage: 2.5V±0.2V 3.3V ± 0.3V • Commercial temperature range • 8 pin, TSSOP, and TDFN(2X2) COL packages • The First True Drop-in Solution Functional Description PCS3P73Z01AW is a 2.5V/3.3V versatile EMI reduction IC based on PulseCore Semiconductor’s patent pending Timing-Safe™ technology. PCS3P73Z01AW accepts one input from an external reference, and locks on to it delivering a 1x Timing-Safe™ clock. PCS3P73Z01AW has a Frequency Selection (FS) control that facilitates selecting one of the two frequency ranges within the operating frequency range. Refer to the frequency Selection table for details . The device has an SSEXTR pin to select different deviation and associated Input-Output Skew (TSKEW), depending upon the value of an external resistor connected between SSEXTR and GND. PCS3P73Z01AW has a DLY_CTRL for adjusting the Input-Output clock delay, depending upon the value of capacitor connected at this pin to GND. PD#/OE provides the Power Down option. Outputs will be tri-stated when power down is active. PCS3P73Z01AW operates from a 2.5V/3.3V supply and is available in an 8 Pin TSSOP, and TDFN (2X2) COL Packages, over Commercial temperature range. Application PCS3P73Z01AW is targeted for use in Displays, Camera modules and SDRAM memory interface systems. Block Diagram VDD GND SSEXTR CLKIN ModOUT (Timing-Safe™) PLL FS PD#/OE DLY_CTRL |
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Similar Description - PCS3P73Z01AWG-08-TR |
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