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PCS3I625Z0xyG-08-SR Datasheet(PDF) 8 Page - PulseCore Semiconductor |
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PCS3I625Z0xyG-08-SR Datasheet(HTML) 8 Page - PulseCore Semiconductor |
8 / 15 page PCS3P625Z05B/C May 2008 PCS3P625Z09B/C rev 0.1 High Frequency Timing-Safe™ Peak EMI Reduction IC 8 of 15 Notice: The information in this document is subject to change without notice. Device - Device Skew Input-Output Skew Test Circuit A Typical example of Timing-Safe™ waveform VDD GND CLKOUT LOAD OUTPUT 0.1uF +3.3V 0.1uF +3.3V VDD TSKEW - One clock cycle N=1 TSKEW+ Input Timing-Safe™ Output TSKEW represents input-output skew when spread spectrum is ON For example, TSKEW = ± 0.125 for an Input clock12MHz, translates in to (1/12MHz) * 0.125=10.41nS Input CLKOUT with SSOFF Input Timing-Safe™ CLKOUT t 7 CLKOUT, Device 1 VDD/2 VDD/2 CLKOUT, Device 2 |
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