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PCS5I961PG-32LR Datasheet(PDF) 10 Page - PulseCore Semiconductor |
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PCS5I961PG-32LR Datasheet(HTML) 10 Page - PulseCore Semiconductor |
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10 / 14 page  November 2006 PCS5I961P rev 0.3 Low Voltage Zero Delay Buffer 10 of 14 Notice: The information in this document is subject to change without notice. Figure 9. Maximum PCS5I961P frequency, VCC = 3.3V, MTBF 9.1 years, driving series terminated transmission lines 0 500 400 300 200 100 0 Convection Ifpm 20 100 120 140 160 190 200 Safe operation fMAX (AC) 80 60 40 TA = 85°C Figure 10. Maximum PCS5I961P frequency, VCC = 3.3V, MTBF 9.1 years, 4pF load per line 0 500 400 300 200 100 0 Convection Ifpm 20 100 120 140 160 190 200 Safe operation fMAX (AC) TA = 75°C 80 60 40 TA = 85°C Figure 11. TCLK PCS5I961P AC test reference for VCC = 3.3V and VCC = 2.5V Differential Pulse Generator Z=50 Ω Z0=50Ω Z0=50Ω RT=50Ω VTT VTT RT=50Ω |
Similar Part No. - PCS5I961PG-32LR |
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Similar Description - PCS5I961PG-32LR |
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