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PCS3P2191A Datasheet(PDF) 2 Page - PulseCore Semiconductor |
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PCS3P2191A Datasheet(HTML) 2 Page - PulseCore Semiconductor |
2 / 8 page May 2008 PCS3P2191A rev 0.3 Spread Spectrum Clock Generator 2 of 8 Notice: The information in this document is subject to change without notice. Pin Configuration Pin Description Pin# Pin Name Type Description 1 VDD P Power Supply Voltage Pin. Connect to +3.3V. 2 GND P Ground Connection. Connect to system ground. 3 S2 I Spread range select. Digital logic input used to select frequency deviation (Refer Spread Deviation Table). This pin has an internal pull-up resistor. 4 GND P Ground Connection. Connect to system ground. 5 CLK1 O Low EMI 4x clock output. 6 CLK2 O Low EMI 4x clock output. 7 GND P Ground Connection. Connect to system ground. 8 XIN/CLKIN I Crystal connection or external reference clock input 9 XOUT O Crystal connection. If using an external reference, this pin must be left unconnected. 10 GND P Ground Connection. Connect to system ground. 11 CLK3 O Low EMI 4x clock output. 12 CLK4 O Low EMI 4x clock output. 13 GND P Ground Connection. Connect to system ground. 14 S1 I Spread range select. Digital logic input used to select frequency deviation (Refer Spread Deviation Table). This pin has an internal pull-up resistor. 15 S0 I Spread range select. Digital logic input used to select frequency deviation (Refer Spread Deviation Table). This pin has an internal pull-up resistor. 16 VDD P Power Supply Voltage Pin. Connect to +3.3V. S0 VDD GND CLK3 GND CLK4 XOUT XIN/CLKIN GND CLK2 CLK1 GND VDD S1 GND S2 PCS3P2191A 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 16Pin TSSOP |
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