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PCS3P73U00AG-08-ST Datasheet(PDF) 5 Page - PulseCore Semiconductor |
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PCS3P73U00AG-08-ST Datasheet(HTML) 5 Page - PulseCore Semiconductor |
5 / 13 page March 2008 PCS3P73U00A rev 0.2 USB 2.0 Peak EMI reduction IC 5 of 13 Notice: The information in this document is subject to change without notice. Fig1: Typical Crystal Interface Circuit Note: For AC Coupled Interface refer to Application Brief:CT100801 Typical Crystal Specifications Fundamental AT cut parallel resonant crystal Nominal frequency 48MHz Frequency tolerance ± 50 ppm or better at 25°C Operating temperature range -25°C to +85°C Storage temperature -40°C to +85°C Load capacitance 18pF Shunt capacitance 7pF maximum ESR 25 Ω RCompliance The value of the compliance resistor , RCompliance sets the USB2.0 signaling rate (frequency) deviation to 1000ppm peak-to-peak (+/-500ppm). It causes a -4dB peak power EMI reduction at the 480MHz fundamental USB2.0 frequency. Higher harmonics are reduced more. If the RCompliance is set to a lower value than its compliance limit, it will set the USB2.0 signaling rate (frequency) deviation to above 1000ppm peak-to-peak. For settings above 1000ppm the USB2.0 compliance pass/fail becomes gradually intermittent. USB2.0 functionality is maintained upto 3000ppm peak-to-peak signaling rate (frequency) deviation. The EMI tradeoff in the system is attenuation/compliance. While fully functional (and compliant intermittent) the 2000ppm frequency deviation can provide -7dB of EMI attenuation at the 480MHz fundamental. R1 = 510Ω C1 = 27 pF C2 = 27 pF Crystal R |
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