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PO74G32ASU Datasheet(PDF) 1 Page - Potato Semiconductor Corporation |
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PO74G32ASU Datasheet(HTML) 1 Page - Potato Semiconductor Corporation |
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1 / 6 page  Copyright © Potato Semiconductor Corporation 54, 74 Series GHz Logic PO54G32A, PO74G32A QUADRUPLE 2-INPUT POSITIVE-OR GATES 10/27/07 1 INPUTS OUTPUT Y A B H X X H L L . Patented technology . Operating frequency up to 1.125GHz with 2pf load . Operating frequency up to 750MHz with 5pf load . Operating frequency up to 350MHz with 15pf load . VCC Operates from 1.65V to 3.6V . Propagation delay < 1.5ns max with 15pf load . Low input capacitance: 4pf typical . Available in 14pin 150mil wide SOIC package . Available in 14pin Ceramic Dual Flatpack . Available in 20pin Leadless Ceramic Chip Carrier Pin Configuration Logic Block Diagram Pin Description 1 2 3 4 5 6 7 14 13 12 11 10 9 8 Potato Semiconductor’s PO74G32A is designed for world top performance using submicron CMOS technology to achieve 1.125GHz TTL /CMOS output frequency with less than 1.5ns propagation delay. This quadruple 2-input positive-OR gate is designed for 1.65-V to 3.6-V VCC operation. The PO74G32A performs the Boolean function Y= A · B or Y= A + B in positive logic. Inputs can be driven from either 3.3V or 5V devices. This feature allows the use of these devices as translators in a mixed 3.3V/5V system environment. A B Y H H L 1A 1B 1Y 2A 2B 2Y GND V C C 4B 4A 4Y 3B 3A 3Y 3 2 1 20 19 9 10 11 12 13 4 5 6 7 8 18 17 16 15 14 4A NC 4Y NC 3B 1Y NC 2A NC 2B FEATURES: DESCRIPTION: |
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