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AP2176MPG-13 Datasheet(PDF) 5 Page - Diodes Incorporated |
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AP2176MPG-13 Datasheet(HTML) 5 Page - Diodes Incorporated |
5 / 17 page AP2166/AP2176 1A DUAL CHANNEL CURRENT-LIMITED POWER SWITCH AP2166/AP2176 Rev 1 5 of 17 APRIL 2009 www.diodes.com © Diodes Incorporated Electrical Characteristics (TA = 25 oC, C IN = 10μF, VIN = +5.0V, unless otherwise stated) Symbol Parameter Test Conditions Min Typ. Max Unit VUVLO Input UVLO Rload=1kΩ 1.6 1.9 2.5 V ISHDN Input Shutdown Current Disabled, IOUT= 0 0.5 1 μA IQ Input Quiescent Current, Dual Enabled, IOUT= 0 95 140 μA ILEAK Input Leakage Current Disabled, OUT grounded 1 μA IREV Reverse Leakage Current Disabled, VIN = 0V, VOUT = 5V, IREV at VIN 1 μA RDS(ON) Switch on-resistance VIN = 5V, IOUT= 1A, -40 oC≤ T A ≤85 oC MSOP-8L-EP 90 135 m Ω SOP-8L 100 135 m Ω VIN = 3.3V, IOUT= 1A, -40 oC≤ T A ≤85 oC 120 160 m Ω ISHORT Short-circuit current limit Enabled into short circuit, CL=68μF 1.5 A ILIMIT Over-Load Current Limit VIN = 5V, VOUT = 4.6V, CL=120μF, -40 oC≤ TA ≤85 oC 1.1 1.5 1.9 A ITrig Current limiting trigger threshold VIN = VEN, Output Current Slew rate (<100A/s), CL=68μF 2.0 A TSHORT Short-circuit Response Time VOUT = 0V to IOUT = ILIMIT (short applied to output), CL = 68μF 20 μs VIL EN Input Logic Low Voltage VIN = 2.7V to 5.5V 0.8 V VIH EN Input Logic High Voltage VIN = 2.7V to 5.5V 2 V ISINK EN Input leakage VEN = 5V 1 μA TD(ON) Output turn-on delay time CL=1μF, Rload=10Ω 0.05 ms TR Output turn-on rise time CL=1μF, Rload=10Ω 0.6 1.5 ms TD(OFF) Output turn-off delay time CL=1μF, Rload=10Ω 0.01 ms TF Output turn-off fall time CL=1μF, Rload=10Ω 0.05 0.1 ms RFLG FLG output FET on-resistance IFLG =10mA 20 40 Ω IFOH Error Flag Off Current VFLG=5V 0.01 1 μA TBlank FLG blanking time CL=68μF 4 7 15 ms TSHDN Thermal shutdown threshold Enabled, Rload=1kΩ 140 °C THYS Thermal shutdown hysteresis 25 °C θ JA Thermal Resistance Junction-to-Ambient SOP-8L (Note 4) 110 oC/W MSOP-8L-EP (Note 5) 60 oC/W Notes: 4. Test condition for SOP-8L: Device mounted on FR-4 2-layer board, 2oz copper, with minimum recommended pad layout. 5. Test condition for MSOP-8L-EP: Device mounted on FR-4 2-layer board, 2oz copper, with minimum recommended pad on top layer and 3 vias to bottom layer ground plane. |
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