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TUSB3200PAH Datasheet(PDF) 8 Page - Texas Instruments |
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TUSB3200PAH Datasheet(HTML) 8 Page - Texas Instruments |
8 / 93 page 1–2 • Micro-Controller Unit (MCU) • Standard 8052 8-bit core • 4K Bytes of program memory ROM that contains a boot loader program that loads the application firmware from external EEPROM • 8K Bytes of program memory RAM which is loaded by the boot loader program • 256 Bytes of internal data memory RAM • Two GPIO ports • MCU handles all USB control, interrupt and bulk endpoint transfers • DMA Controller • Four DMA channels to support streaming USB audio data to/from the CODEC Port Interface • Each channel can support a single USB isochronous endpoint • For I2S modes, either a single or multiple USB isochronous endpoints can be used to support multiple DACs/ADCs • CODEC Port Interface • Configurable to support AC’97 1.X, AC’97 2.X or I2S serial interface formats • I2S modes can support a combination of up to 4 DACs and/or 3 ADCs • Can be configured as a general-purpose serial interface • I2C Interface • Master only interface • Does not support a multimaster bus environment • Programmable to 100 kbit/s or 400 kbit/s data transfer speeds • Pulse Width Modulation (PWM) Output • Programmable frequency range from 732.4 Hz to 93.75 kHz • Programmable duty cycle • General Characteristics • Available in a 52-Pin TQFP Package • On-chip phase-locked loop (PLL) with internal oscillator is used to generate internal clocks from a 6 MHz crystal input • 3.3-V core and 5-V compatible input/output buffers used for CODEC port interface • Reset output available which is asserted for both system and USB reset • External MCU mode supports application firmware development |
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