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VSP2590ZWVR Datasheet(PDF) 3 Page - Texas Instruments |
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VSP2590ZWVR Datasheet(HTML) 3 Page - Texas Instruments |
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3 / 36 page  ELECTRICAL CHARACTERISTICS VSP2590 www.ti.com.............................................................................................................................................................................................. SBES012 – OCTOBER 2008 All specifications at TA = +25°C, all power-supply voltages = +3.0 V, and conversion rate = 36 MHz, unless otherwise noted. VSP2560ZWV PARAMETER TEST CONDITIONS MIN TYP MAX UNIT RESOLUTION Resolution 16 Bits CHANNEL Channel 2 Channels CONVERSION RATE Maximum conversion/clock rate VCC = 3.0 V 36 41.5 MHz ANALOG INPUT (Channels A, B) Maximum input signal level for full-scale Gain = –3 dB 1.5 VPP out Maximum input signal for full-scale out Gain = 0 dB 1.0 VPP Allowable input range 2.5 VPP Input capacitance Without package, stray, or ESD capacitance 15 pF Input limit GND – 0.3 VCC + 3.3 V TRANSFER CHARACTERISTICS (Channels A, B) (DNL) Differential nonlinearity ±0.8 LSB ±32 LSB (INL) Integral nonlinearity Data range process = 0 mV to 100 mV ±10 LSB No missing codes Ensured Signal-to-noise ratio(1) Gain = 0 dB 75 dB CCD offset correction range –200 200 mV PROGRAMMABLE GAIN Analog gain programmable range –3 +18 dB Analog gain programmable step 3 dB Analog gain accuracy ±0.3 dB Analog gain channel mismatch 5 % Digital gain programmable range 0 32 dB Digital gain programmable step 0.032 dB INPUT CLAMP (Channels A, B) Clamp on-resistance 400 Ω Clamp level Use internal reference 1.8 V OPTICAL BLACK CLAMP (OBCLP) LOOP Control DAC resolution 12 Bits Loop time constant 40.7 µs Programmable range of clamp level 1536 3072 LSB OBCLP level at code = 1000 0000 0000b Optical black clamp level 2048 LSB (center) OB level program step 1 LSB (1) SNR = 20 log (full-scale voltage/rms noise). Copyright © 2008, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Link(s): VSP2590 |
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