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PCA2003 Datasheet(PDF) 7 Page - NXP Semiconductors

Part # PCA2003
Description  32 kHz watch circuit with programmable adaptive motor pulse and pulse period
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

PCA2003 Datasheet(HTML) 7 Page - NXP Semiconductors

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PCA2003_2
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 02 — 21 July 2009
7 of 21
NXP Semiconductors
PCA2003
32 kHz watch circuit with programmable adaptive motor pulse
7.3 Time calibration
The quartz crystal oscillator has an integrated capacitance of 5.2 pF, which is lower than
the specified capacitance (CL) of 8.2 pF for the quartz crystal (see Table 10). Therefore,
the oscillator frequency is typically 60 ppm higher than 32.768 kHz. This positive
frequency offset is compensated by removing the appropriate number of 8192 Hz pulses
in the divider chain (maximum 127 pulses), every 1 or 2 minutes. The time correction is
given in Table 3.
After measuring the effective oscillator frequency, the number of correction pulses must
be calculated and stored together with the calibration period in the OTP memory (see
Section 7.7).
The oscillator frequency can be measured at pad RESET, where a square wave signal
with the frequency of
is provided.
This frequency shows a jitter every minute or every two minutes, which originates from the
time calibration, depending on the programmed calibration period.
Details on how to measure the oscillator frequency and the programmed inhibition time
are given in Section 7.10.
7.4 Reset
At pad RESET an output signal with a frequency of
is provided.
Connecting pad RESET to VDD stops the motor drive and opens all four (P1, N1, P2 and
N2) driver switches (see Figure 5). Connecting pad RESET to VSS activates the test
mode. In this mode the motor output frequency is 32 Hz, which can be used to test the
mechanical function of the watch.
After releasing the pad RESET, the motor starts exactly one second later with the smallest
duty cycle and with the opposite polarity to the last pulse before stopping.
The debounce time for the RESET function is between 31 ms and 62 ms.
7.5 Programming possibilities
The programming data is stored in OTP cells (EPROM cells). At delivery, all memory cells
are in state 0. The cells can be programmed to the state 1, but then there is no more set
back to state 0.
The programming data is organized in an array of four 8-bit words: word A contains the
time calibration, words B and C contain the setting for the monitor pulses and word D
contains the type recognition (see Table 4).
Table 3.
Time calibration
Calibration
period
Correction per step (n = 1)
Correction per step (n = 127)
ppm
Seconds per day ppm
Seconds per day
1 minute
2.03
0.176
258
22.3
2 minutes
1.017
0.088
129
11.15
1
1024
------------
f
osc
×
1
1024
------------
f
osc
×
32 Hz
=


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