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ISL6308AEVAL1Z Datasheet(PDF) 6 Page - Intersil Corporation

Part # ISL6308AEVAL1Z
Description  Three-Phase Buck PWM Controller with High Current Integrated MOSFET Drivers
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Manufacturer  INTERSIL [Intersil Corporation]
Direct Link  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

ISL6308AEVAL1Z Datasheet(HTML) 6 Page - Intersil Corporation

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6
FN6669.0
September 9, 2008
Maximum External Reference (Note 4)
REF pin input
-
1.75
-
V
OFS Sink Current Accuracy (Negative Offset)
ROFS = 30kΩ from OFS to VCC
47.5
50.0
52.5
µA
OFS Source Current Accuracy (Positive Offset)
ROFS = 10kΩ from OFS to GND
47.5
50.0
52.5
µA
ERROR AMPLIFIER
DC Gain (Note 3)
RL = 10k to ground
-
96
-
dB
Gain-Bandwidth Product (Note 3)
CL = 100pF, RL = 10k to ground
-
20
-
MHz
Slew Rate (Note 3)
CL = 100pF, Load = ±400µA
-
8
-
V/µs
Maximum Output Voltage
VCC = 5V; Load = 1mA
3.90
4.20
4.60
V
Minimum Output Voltage
Load = -1mA
0.6
0.85
1.0
V
REMOTE SENSE DIFFERENTIAL AMPLIFIER
Input Bias Current (VSEN)
(VSEN = 1.5V)
49
55
60
µA
Bandwidth (Note 3)
-20
-
MHz
Slew Rate (Note 3)
-8
-
V/µs
OVERCURRENT PROTECTION
OCSET Trip Current
93
100
107
µA
OCSET Accuracy
OC comparator offset (OCSET and ISUM Difference)
-5
0
5
mV
ICOMP Offset
ISEN amplifier offset
-5
0
5
mV
PROTECTION
Undervoltage Threshold
VSEN Falling
80
82
84
%VID
Undervoltage Hysteresis
VSEN Rising - VSEN falling
2
3
4
%VID
Overvoltage Threshold While IC Disabled (VOVP)
1.62
1.67
1.72
V
Overvoltage Threshold (VOVP_rise)
VSEN Rising
DAC +
125mV
DAC +
150mV
DAC +
175mV
V
Overvoltage Hysteresis
VSEN Rising - VSEN Falling
75
100
125
mV
Open Sense-Line Protection Threshold
IREF Rising and Falling
VDIFF
+ 0.9V
VDIFF +
1V
VDIFF
+ 1.1V
V
OVP Output High Drive Voltage
IOVP = 50mA, VCC = 5V
2.2
3.8
4.4
V
PGOOD Output Low
VCC = 5V; 1k
Ω resistor to VCC
0
0.2
0.4
V
SWITCHING TIME
UGATE Rise Time (Note 3)
tRUGATE; VPVCC = 12V, 3nF Load, 10% to 90%
-
26
-
ns
LGATE Rise Time (Note 3)
tRLGATE; VPVCC = 12V, 3nF Load, 10% to 90%
-
18
-
ns
UGATE Fall Time (Note 3)
tFUGATE; VPVCC = 12V, 3nF Load, 90% to 10%
-
18
-
ns
LGATE Fall Time (Note 3)
tFLGATE; VPVCC = 12V, 3nF Load, 90% to 10%
-
12
-
ns
UGATE Turn-On Non-Overlap (Note 3)
tPDHUGATE; VPVCC = 12V, 3nF Load, Adaptive
-
10
-
ns
LGATE Turn-On Non-Overlap (Note 3)
tPDHLGATE; VPVCC = 12V, 3nF Load, Adaptive
-
10
-
ns
GATE DRIVE RESISTANCE (Note 3)
Upper Drive Source Resistance
VPVCC = 12V, 150mA Source Current
1.25
2.0
3.0
Ω
Upper Drive Sink Resistance
VPVCC = 12V, 150mA Sink Current
0.9
1.6
3.0
Ω
Lower Drive Source Resistance
VPVCC = 12V, 150mA Source Current
0.85
1.4
2.2
Ω
Electrical Specifications
Recommended Operating Conditions, Unless Otherwise Specified. Parameters with MIN and/or MAX limits are
100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization and are
not production tested. (Continued)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
ISL6308A


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