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CY2XP24ZXCT Datasheet(PDF) 2 Page - Cypress Semiconductor

Part # CY2XP24ZXCT
Description  Crystal to LVPECL Clock Generator
Download  8 Pages
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Manufacturer  CYPRESS [Cypress Semiconductor]
Direct Link  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

CY2XP24ZXCT Datasheet(HTML) 2 Page - Cypress Semiconductor

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CY2XP24
Document #: 001-15705 Rev. *D
Page 2 of 8
Frequency Table
Inputs
PLL Multiplier Value
Output Frequency (MHz)
Crystal Frequency (MHz)
F_SEL
25
1
7.5
187.5
25
0
6.25
156.25
Absolute Maximum Conditions
Parameter
Description
Condition
Min
Max
Unit
VDD
Supply Voltage
–0.5
4.4
V
VIN[1]
Input Voltage, DC
Relative to VSS
–0.5
VDD + 0.5
V
TS
Temperature, Storage
Non operating
–65
150
°C
TJ
Temperature, Junction
135
°C
ESDHBM
ESD Protection (Human Body Model)
JEDEC STD 22-A114-B
2000
V
UL–94
Flammability Rating
At 1/8 in.
V–0
ΘJA[2]
Thermal Resistance, Junction to Ambient 0 m/s airflow
100
°C/W
1 m/s airflow
91
2.5 m/s airflow
87
Operating Conditions
Parameter
Description
Min
Max
Unit
VDD
3.3V Supply Voltage
3.135
3.465
V
2.5V Supply Voltage
2.375
2.625
V
TA
Ambient Temperature, Commercial
0
70
°C
Ambient Temperature, Industrial
-40
85
°C
TPU
Power up time for all VDD to reach minimum specified voltage (ensure power
ramps are monotonic)
0.05
500
ms
Note
1. The voltage on any input or I/O pin cannot exceed the power pin during power up. Power supply sequencing is NOT required.
2. Simulated using Apache Sentinel TI software. The board is derived from the JEDEC multilayer standard. It measures 76 x 114 x 1.6 mm and has 4-layers of
copper (2/1/1/2 oz.). The internal layers are 100% copper planes, while the top and bottom layers have 50% metalization. No vias are included in the model.
3. IDD includes approximately 24 mA of current that is dissipated externally in the output termination resistors.
DC Electrical Characteristics
Parameter
Description
Test Conditions
Min
Typ
Max
Unit
IDD[3]
Power Supply Current with
output terminated
VDD = 3.465V, FOUT = 187.5 MHz,
output terminated
––
150V
VDD = 2.625V, FOUT = 187.5 MHz,
output terminated
––
145V
VOH
LVPECL Output High Voltage
VDD = 3.3V or 2.5V, RTERM = 50Ω to
VDD – 2.0V
VDD –1.15
VDD –0.75
V
VOL
LVPECL Output Low Voltage
VDD = 3.3V or 2.5V, RTERM = 50Ω to
VDD – 2.0V
VDD –2.0
VDD –1.625
V
VOD1
LVPECL Peak-to-Peak Output
Voltage Swing
VDD = 3.3V or 2.5V, RTERM = 50Ω to
VDD – 2.0V
600
1000
mV
VOD2
LVPECL Output Voltage Swing
(VOH - VOL)
VDD = 2.5V, RTERM = 50Ω to VDD
1.5V
500
1000
mV
[+] Feedback


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