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ISL54223 Datasheet(PDF) 4 Page - Intersil Corporation |
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ISL54223 Datasheet(HTML) 4 Page - Intersil Corporation |
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4 / 13 page  4 FN6836.1 May 27, 2009 Turn-OFF Disable Time, tDISABLE VDD = 3.3V, RL = 15kΩ, CL = 50pF, Time into All-Off state, Time is highly dependent on the load (RL, CL) time constant. 25 - 75 - ns Skew, (tSKEWOUT - tSKEWIN) VDD = 3.3V, SEL = 0V or 3.3V, OE = 0V, RL = 45Ω, CL = 10pF, tR = tF = 500ps at 480Mbps, (Duty Cycle = 50%) (see Figure 6) 25 - 53 - ps Rise/Fall Degradation (Propagation Delay), tPD VDD = 3.3V, SEL = 0V or 3.3V, OE = 0V, RL = 45Ω, CL = 10pF (see Figure 6) 25 - 250 - ps Crosstalk VDD = 3.3V, RL = 50Ω, f = 240MHz (see Figure 5) 25 - -25 - dB OFF-Isolation VDD = 3.3V, OE = 3.3V, RL = 50Ω, f = 240MHz 25 - -27 - dB -3dB Bandwidth Signal = 0dBm, 0.2VDC offset, RL = 50Ω 25 - 782 - MHz OFF Capacitance, CHSxOFF f = 1MHz, VDD = 3.3V, SEL = 0V, OE = 3.3V, VHSD1x or VHSD2x = VDx = 0V (see Figure 4) 25 - 2.5 - pF COM ON Capacitance, CDX(ON) f = 1MHz, VDD = 3.3V, SEL = 0V or 3.3V, OE = 0V, VHSD1x or VHSD2x = VDx = 0V (see Figure 4) 25 - 6.5 - pF POWER SUPPLY CHARACTERISTICS Power Supply Range, VDD Full 1.8 3.3 V Positive Supply Current, IDD VDD = 3.3V, SEL = 0V or VDD, OE = 0V or VDD 25 - 32 40 µA Full - - 50 µA Positive Supply Current, IDD VDD = 1.8V, SEL = 0V, OE = 0V or VDD 25 - 5.8 7.5 µA Full - - 8 µA DIGITAL INPUT CHARACTERISTICS Input Voltage Low, VSELL, VOEL VDD = 1.8V to 3.3V Full - - 0.5 V Input Voltage High, VSELH, VOEH VDD = 1.8V to 3.3V Full 1.4 - VDD V Input Current, ISELL, IOEL VDD = 3.3V, SEL = 0V, OE = 0V Full - 104 - nA Input Current, ISELH VDD = 3.3V, SEL = 3.3V Full - -1.5 - nA Input Current, IOEH VDD = 3.3V, OE = 3.3V Full - -1.6 - nA NOTES: 4. VLOGIC = Input voltage to perform proper function. 5. The algebraic convention, whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet. 6. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization and are not production tested. 7. Flatness is defined as the difference between maximum and minimum value of ON-resistance over the specified analog signal range. 8. rON matching between channels is calculated by subtracting the channel with the highest max rON value from the channel with lowest max rON value, between HSD2+ and HSD2- or between HSD1+ and HSD1-. 9. Limits established by characterization and are not production tested. Electrical Specifications - 1.8V to 3.3V Supply Test Conditions: VDD = +3.3V, GND = 0V, VSELH = 1.4V, VSELL = 0.5V, VOEH = 1.4V, VOEL = 0.5V, (Note 4), Unless Otherwise Specified. (Continued) PARAMETER TEST CONDITIONS TEMP (°C) MIN (Notes 5, 6) TYP MAX (Notes 5, 6) UNITS ISL54223 |
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Similar Description - ISL54223 |
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