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CY8C21123, CY8C21223, CY8C21323
Document Number: 38-12022 Rev. *K
Page 9 of 36
20-Pin Part Pinout
Table 6. Pin Definitions - CY8C21323 20-Pin SSOP
Pin
No.
Type
Pin
Name
Description
Figure 6. CY8C21323 20-Pin SSOP
Digital
Analog
1
IO
I
P0[7]
Analog Column Mux Input
2
IO
I
P0[5]
Analog Column Mux Input
3
IO
I
P0[3]
Analog Column Mux Input
4
IO
I
P0[1]
Analog Column Mux Input
5
Power
Vss
Ground Connection
6
IO
P1[7]
I2C Serial Clock (SCL)
7
IO
P1[5]
I2C Serial Data (SDA)
8
IO
P1[3]
9
IO
P1[1]
I2C Serial Clock (SCL), ISSP-SCLK[3]
10
Power
Vss
Ground connection
11
IO
P1[0]
I2C Serial Data (SDA), ISSP-SDATA[3]
12
IO
P1[2]
13
IO
P1[4]
Optional External Clock Input (EXTCLK)
14
IO
P1[6]
15
Input
XRES
Active High External Reset with Internal
Pull Down
16
IO
I
P0[0]
Analog Column Mux Input
17
IO
I
P0[2]
Analog Column Mux Input
18
IO
I
P0[4]
Analog Column Mux Input
19
IO
I
P0[6]
Analog Column Mux Input
20
Power
Vdd
Supply Voltage
LEGEND A = Analog, I = Input, and O = Output.
SSOP
Vdd
P0[6],A,I
P0[4],A,I
P0[2],A,I
P0[0],A,I
XRES
P1[6]
P1[4],EXTCLK
P1[2]
P1[0],I2C SDA
20
19
18
17
16
15
14
13
12
11
1
2
3
4
5
6
7
8
9
10
A,I,P0[7]
A, I,P0[5]
A, I,P0[3]
A, I,P0[1]
I2C SCL,P1[7]
I2C SDA,P1[5]
P1[3]
I2C SCL,P1[1]
Vss
Vss
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