8 / 34 page
CY8C20224, CY8C20324
CY8C20424, CY8C20524
Document Number: 001-41947 Rev. *D
Page 8 of 34
24-Pin Part Pinout
Figure 4. CY8C20324 24-Pin PSoC Device
QFN
(Top View)
AI, P2[5]
AI, I2C SCL, SPI SS, P1[7]
AI, I2C SDA, SPI MISO, P1[5]
AI, SPI CLK, P1[3]
1
2
3
4
5
6
18
17
16
15
14
13
P0[2], AI
P0[0], AI
P0[4], AI
AI, P2[3]
AI, P2[1]
P1[6], AI
XRES
P2[0], AI
Note
2. The center pad on the QFN package is connected to ground (Vss) for best mechanical, thermal, and electrical performance. If not connected to ground, it is
electrically floated and not connected to any other signal.
Table 3. 24-Pin Part Pinout (QFN [2])
Pin No.
Digital
Analog
Name
Description
1
IO
I
P2[5]
2
IO
I
P2[3]
3
IO
I
P2[1]
4
IOH
I
P1[7]
I2C SCL, SPI SS
5
IOH
I
P1[5]
I2C SDA, SPI MISO
6
IOH
I
P1[3]
SPI CLK
7
IOH
I
P1[1]
CLK[1], I2C SCL, SPI MOSI
8
NC
No connection
9
Power
Vss
Ground connection
10
IOH
I
P1[0]
DATA[1], I2C SDA
11
IOH
I
P1[2]
12
IOH
I
P1[4]
Optional external clock input (EXTCLK)
13
IOH
I
P1[6]
14
Input
XRES
Active high external reset with internal pull down
15
IO
I
P2[0]
16
IO
I
P0[0]
17
IO
I
P0[2]
18
IO
I
P0[4]
19
IO
I
P0[6]
20
Power
Vdd
Supply voltage
21
IO
I
P0[7]
22
IO
I
P0[5]
23
IO
I
P0[3]
Integrating input
24
IO
I
P0[1]
Integrating input
CP
Power
Vss
Center pad is connected to ground
A = Analog, I = Input, O = Output, OH = 5 mA High Output Drive
[+] Feedback
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
