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CY8C21123, CY8C21223, CY8C21323
Document Number: 38-12022 Rev. *K
Page 11 of 36
Register Reference
This section lists the registers of the CY8C21x23 PSoC device.
For detailed register information, refer the PSoC Programmable
System-on-Chip Technical Reference Manual.
Register Conventions
The register conventions specific to this section are listed in the
following table.
Register Mapping Tables
The PSoC device has a total register address space of
512 bytes. The register space is referred to as IO space and is
divided into two banks. The XOI bit in the Flag register (CPU_F)
determines which bank the user is currently in. When the XOI bit
is set the user is in Bank 1.
Note In the following register mapping tables, blank fields are
Reserved and must not be accessed.
Table 8. Register Conventions
Convention
Description
R
Read register or bit(s)
W
Write register or bit(s)
L
Logical register or bit(s)
C
Clearable register or bit(s)
#
Access is bit specific
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