Electronic Components Datasheet Search
  English  ▼
ALLDATASHEET.NET

X  

CY14B101LA-SP45XC Datasheet(PDF) 3 Page - Cypress Semiconductor

Part # CY14B101LA-SP45XC
Description  1 Mbit (128K x 8/64K x 16) nvSRAM
Download  24 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  CYPRESS [Cypress Semiconductor]
Direct Link  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

CY14B101LA-SP45XC Datasheet(HTML) 3 Page - Cypress Semiconductor

  CY14B101LA-SP45XC Datasheet HTML 1Page - Cypress Semiconductor CY14B101LA-SP45XC Datasheet HTML 2Page - Cypress Semiconductor CY14B101LA-SP45XC Datasheet HTML 3Page - Cypress Semiconductor CY14B101LA-SP45XC Datasheet HTML 4Page - Cypress Semiconductor CY14B101LA-SP45XC Datasheet HTML 5Page - Cypress Semiconductor CY14B101LA-SP45XC Datasheet HTML 6Page - Cypress Semiconductor CY14B101LA-SP45XC Datasheet HTML 7Page - Cypress Semiconductor CY14B101LA-SP45XC Datasheet HTML 8Page - Cypress Semiconductor CY14B101LA-SP45XC Datasheet HTML 9Page - Cypress Semiconductor Next Button
Zoom Inzoom in Zoom Outzoom out
 3 / 24 page
background image
PRELIMINARY
CY14B101LA, CY14B101NA
Document #: 001-42879 Rev. *C
Page 3 of 24
Figure 3. Pin Diagram - 54-Pin TSOP II
Table 1. Pin Definitions
Pin Name
I/O Type
Description
A0 – A16
Input
Address Inputs Used to Select one of the 131,072 Bytes of the nvSRAM for x8 Configuration.
A0 – A15
Address Inputs Used to Select one of the 65,536 Words of the nvSRAM for x16 Configuration.
DQ0 – DQ7
Input/Output
Bidirectional Data I/O Lines for x8 Configuration. Used as input or output lines depending on operation.
DQ0 – DQ15
Bidirectional Data I/O Lines for x16 Configuration. Used as input or output lines depending on
operation.
WE
Input
Write Enable Input, Active LOW. When the chip is enabled and WE is LOW, data on the I/O pins is written
to the specific address location.
CE
Input
Chip Enable Input, Active LOW. When LOW, selects the chip. When HIGH, deselects the chip.
OE
Input
Output Enable, Active LOW. The active LOW OE input enables the data output buffers during read
cycles. I/O pins are tristated on deasserting OE HIGH.
BHE
Input
Byte High Enable, Active LOW. Controls DQ15 - DQ8.
BLE
Input
Byte Low Enable, Active LOW. Controls DQ7 - DQ0.
VSS
Ground
Ground for the Device. Must be connected to the ground of the system.
VCC
Power
Supply
Power Supply Inputs to the Device. 3.0V +20%, –10%
HSB[8]
Input/Output Hardware STORE Busy (HSB). When LOW this output indicates that a Hardware STORE is in progress.
When pulled LOW external to the chip it initiates a nonvolatile STORE operation. A weak internal pull up
resistor keeps this pin HIGH if not connected (connection optional). After each STORE operation HSB is
driven HIGH for short time with standard output high current.
VCAP
Power
Supply
AutoStore Capacitor. Supplies power to the nvSRAM during power loss to store data from SRAM to
nonvolatile elements.
NC
No Connect No Connect. This pin is not connected to the die.
Pinouts (continued)
NC
DQ7
DQ6
DQ5
DQ4
VCC
DQ3
DQ2
DQ1
DQ0
NC
A0
A1
A2
A3
A4
A5
A6
A7
VCAP
WE
A8
A10
A11
A12
A13
A14
A15
NC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
54 - TSOP II
Top View
(not to scale)
OE
CE
VCC
NC
VSS
NC
A9
NC
NC
NC
NC
NC
NC
54
53
52
51
49
50
HSB
BHE
BLE
DQ15
DQ14
DQ13
DQ12
VSS
DQ11
DQ10
DQ9
DQ8
(x16)
[6]
[7]
[4]
[5]
[+] Feedback


Similar Part No. - CY14B101LA-SP45XC

ManufacturerPart #DatasheetDescription
logo
Cypress Semiconductor
CY14B101LA-SP45XI CYPRESS-CY14B101LA-SP45XI Datasheet
1Mb / 28P
   1 Mbit (128K x 8/64K x 16) nvSRAM
CY14B101LA-SP45XI CYPRESS-CY14B101LA-SP45XI Datasheet
725Kb / 29P
   1-Mbit (128 K 횞 8/64 K 횞 16) nvSRAM
CY14B101LA-SP45XIT CYPRESS-CY14B101LA-SP45XIT Datasheet
1Mb / 28P
   1 Mbit (128K x 8/64K x 16) nvSRAM
CY14B101LA-SP45XIT CYPRESS-CY14B101LA-SP45XIT Datasheet
725Kb / 29P
   1-Mbit (128 K 횞 8/64 K 횞 16) nvSRAM
More results

Similar Description - CY14B101LA-SP45XC

ManufacturerPart #DatasheetDescription
logo
Cypress Semiconductor
CY14B101LA_1107 CYPRESS-CY14B101LA_1107 Datasheet
1Mb / 28P
   1 Mbit (128K x 8/64K x 16) nvSRAM
CY14B101KA CYPRESS-CY14B101KA_11 Datasheet
1Mb / 34P
   1 Mbit (128K x 8/64K x 16) nvSRAM with Real Time Clock
CY14B101KA CYPRESS-CY14B101KA Datasheet
972Kb / 29P
   1 Mbit (128K x 8/64K x 16) nvSRAM with Real Time Clock
CY14E101LA CYPRESS-CY14E101LA Datasheet
602Kb / 19P
   1 Mbit (128K x 8) nvSRAM
CY14B101L CYPRESS-CY14B101L_09 Datasheet
550Kb / 18P
   1 Mbit (128K x 8) nvSRAM
CY14B101L CYPRESS-CY14B101L Datasheet
1Mb / 18P
   1-Mbit (128K x 8) nvSRAM
CY14E102L CYPRESS-CY14E102L Datasheet
634Kb / 21P
   2-Mbit (256K x 8/128K x 16) nvSRAM
CY14B101Q1 CYPRESS-CY14B101Q1_10 Datasheet
914Kb / 24P
   1 Mbit (128K x 8) Serial SPI nvSRAM
CY14B101Q1 CYPRESS-CY14B101Q1 Datasheet
1Mb / 22P
   1 Mbit (128K x 8) Serial SPI nvSRAM
CY14B101K CYPRESS-CY14B101K_09 Datasheet
796Kb / 28P
   1 Mbit (128K x 8) nvSRAM With Real Time Clock
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24


Datasheet Download

Go To PDF Page


Link URL




Privacy Policy
ALLDATASHEET.NET
Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com