2

UCC18500/1/2/3

UCC28500/1/2/3

UCC38500/1/2/3

DIL-20, SOIC-20 (TOP VIEW)

N, DW and J Packages

ABSOLUTE MAXIMUM RATINGS

Gate Drive Current

Continuous . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.2A

50% Duty Cycle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1A

Input Voltage

PKLMT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5V

Maximum Negative Voltage, GT1, GT2,

PKLMT, MOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5V

Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1W

Currents are positive into, negative out of the specified termi-

nal. Consult Packaging Section of Databook for thermal limita-

tions and considerations of packages. All voltages are

referenced to GND.

IAC

VFF

VREF

MOUT

ISENSE1

PKLMT

CAOUT

SS2

RT

VAOUT

ISENSE2

GND

VERR

VSENSE

OVP/ENA

CT

GT2

VCC

GT1

20

19

18

17

16

15

14

13

12

11

1

2

3

4

5

6

7

8

9

10

PWRGND

CONNECTION DIAGRAMS

UCC

850

ORDERING INFORMATION

TEMPERATURE RANGE

PRODUCT OPTION

PACKAGE

UVLO

UVLO2 HYSTERESIS

UCC18500

16

1.2

UCC18501

–55

° C to +125° C

10.5

1.2

J-CDIP

UCC18502

16

3.0

N-PDIP

UCC18503

10.5

3.0

DW-SOIC

UCC28500

16

1.2

N-PDIP

DW-SOIC

UCC28501

–40

° C to +85° C

10.5

1.2

UCC28502

16

3.0

UCC28503

10.5

3.0

UCC38500

16

1.2

UCC38501

0

° C to +70° C

10.5

1.2

UCC38502

16

3.0

UCC38503

10.5

3.0

PACKAGE INFORMATION

The UCC18500 PFC section incorporates a low offset

voltage amplifier with 7.5V reference, a highly linear mul-

tiplier capable of a wide current range, a high bandwidth,

low offset current amplifier, with a novel noise attenuation

configuration, PWM comparator and latch and a high cur-

rent output driver. Additional PFC features include

over-voltage protection, zero power detection to turn-off

the output when VAOUT is below 0.25V and peak current

and power limiting.

The DC-to-DC section relies on an error signal generated

on secondary-side and processes it by performing peak

current mode control. The DC-to-DC section also fea-

tures current limiting, a controlled soft-start, preset oper-

ating range with selectable options, and 50% maximum

duty cycle.

The UCC38500 and UCC38502 have a wide PFC-UVLO

threshold (16.5V/10V) for bootstrap bias supply opera-

tion. The UCC38501 and UCC38503 are designed with a

narrow UVLO range (10.5V/10V) more suitable for fixed

bias operation. The UCC38500 and UCC38501 have a

narrow UVLO threshold for PWM stage (to allow opera-

tion down to 75% of nominal bulk voltage), while the

UCC38502 and UCC38503 are configured for a much

wider operation range for the PWM stage (down to 50%

of bulk nominal voltage).

DESCRIPTION (cont.)