CY62157EV30 MoBL®
Document #: 38-05445 Rev. *F
Page 3 of 15
Maximum Ratings
Exceeding the maximum ratings may impair the useful life of the
device. User guidelines are not tested.
Storage Temperature ................................ –65°C to + 150°C
Ambient Temperature with
Power Applied .......................................... –55°C to + 125°C
Supply Voltage to Ground
Potential ............................... –0.3V to 3.9V (VCCmax + 0.3V)
DC Voltage Applied to Outputs
in High-Z State [5, 6] ............... –0.3V to 3.9V (VCCmax + 0.3V)
DC Input Voltage [5, 6] ........... –0.3V to 3.9V (VCC max + 0.3V)
Output Current into Outputs (LOW) ............................ 20 mA
Static Discharge Voltage .......................................... > 2001V
(MIL-STD-883, Method 3015)
Latch Up Current ................................................... > 200 mA
Operating Range
Device
Range
Ambient
Temperature
VCC
[7]
CY62157EV30LL Ind’l/Auto-A –40°C to +85°C
2.2V to
3.6V
Auto-E
–40°C to +125°C
Electrical Characteristics
Over the Operating Range
Parameter
Description
Test Conditions
45 ns (Ind’l/Auto-A)
55 ns (Auto-E)
Unit
Min
Typ [1]
Max
Min
Typ [1]
Max
VOH
Output HIGH
Voltage
IOH = –0.1 mA
2.0
2.0
V
IOH = –1.0 mA, VCC > 2.70V
2.4
2.4
V
VOL
Output LOW
Voltage
IOL = 0.1 mA
0.4
0.4
V
IOL = 2.1mA, VCC > 2.70V
0.4
0.4
V
VIH
Input HIGH
Voltage
VCC = 2.2V to 2.7V
1.8
VCC + 0.3
1.8
VCC + 0.3
V
VCC = 2.7V to 3.6V
2.2
VCC + 0.3
2.2
VCC + 0.3
V
VIL
Input LOW
Voltage
VCC = 2.2V to 2.7V
–0.3
0.6
–0.3
0.6
V
VCC = 2.7V to 3.6V
–0.3
0.8
–0.3
0.8
V
IIX
Input Leakage
Current
GND < VI < VCC
–1
+1
–4
+4
μA
IOZ
Output Leakage
Current
GND < VO < VCC, Output Disabled
–1
+1
–4
+4
μA
ICC
VCC Operating
Supply Current
f = fmax = 1/tRC VCC = VCCmax
IOUT = 0 mA
CMOS levels
18
25
18
35
mA
f = 1 MHz
1.8
3
1.8
4
ISB1
Automatic CE
Power Down
Current —
CMOS Inputs
CE1 > VCC − 0.2V, CE2 < 0.2V
VIN > VCC – 0.2V, VIN < 0.2V)
f = fmax (Address and Data Only),
f = 0 (OE, BHE, BLE and WE),
VCC = 3.60V
28
2
30
μA
ISB2
[8]
Automatic CE
Power Down
Current —
CMOS Inputs
CE1 > VCC – 0.2V or CE2 < 0.2V,
VIN > VCC – 0.2V or VIN < 0.2V,
f = 0, VCC = 3.60V
28
2
30
μA
Notes
5. VIL(min) = –2.0V for pulse durations less than 20 ns.
6. VIH(max) = VCC + 0.75V for pulse durations less than 20 ns.
7. Full device AC operation assumes a 100
μs ramp time from 0 to V
cc(min) and 200 μs wait time after VCC stabilization.
8. Only chip enables (CE1 and CE2), byte enables (BHE and BLE) and BYTE (48 TSOP I only) need to be tied to CMOS levels to meet the ISB2 / ICCDR spec. Other inputs
can be left floating.
9. Tested initially and after any design or process changes that may affect these parameters.
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