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UCC1804L Datasheet(PDF) 5 Page - Texas Instruments

Part # UCC1804L
Description  Low-Power BiCMOS Current-Mode PWM
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

UCC1804L Datasheet(HTML) 5 Page - Texas Instruments

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5
UCC1800/1/2/3/4/5
UCC2800/1/2/3/4/5
UCC3800/1/2/3/4/5
PIN DESCRIPTIONS
COMP: COMP is the output of the error amplifier and the
input of the PWM comparator.
Unlike other devices, the error amplifier in the UCC3800
family is a true, low output-impedance, 2MHz operational
amplifier. As such, the COMP terminal can both source
and sink current. However, the error amplifier is internally
current limited, so that you can command zero duty cycle
by externally forcing COMP to GND.
The UCC3800 family features built-in full cycle Soft Start.
Soft Start is implemented as a clamp on the maximum
COMP voltage.
CS: CS is the input to the current sense comparators.
The UCC3800 family has two different current sense
comparators: the PWM comparator and an over-current
comparator.
The UCC3800 family contains digital current sense filter-
ing, which disconnects the CS terminal from the current
sense comparator during the 100ns interval immediately
following the rising edge of the OUT pin. This digital filter-
ing, also called leading-edge blanking, means that in
most applications, no analog filtering (RC filter) is re-
quired on CS. Compared to an external RC filter tech-
nique, the leading-edge blanking provides a smaller
effective CS to OUT propagation delay. Note, however,
that the minimum non-zero On-Time of the OUT signal is
directly affected by the leading-edge-blanking and the CS
to OUT propagation delay.
The over-current comparator is only intended for fault
sensing, and exceeding the over-current threshold will
cause a soft start cycle.
FB: FB is the inverting input of the error amplifier. For
best stability, keep FB lead length as short as possible
and FB stray capacitance as small as possible.
GND: GND is reference ground and power ground for all
functions on this part.
OUT: OUT is the output of a high-current power driver ca-
pable of driving the gate of a power MOSFET with peak
currents exceeding
± 750mA. OUT is actively held low
when VCC is below the UVLO threshold.
The high-current power driver consists of FET output de-
vices, which can switch all of the way to GND and all of
the way to VCC. The output stage also provides a very
low impedance to overshoot and undershoot. This means
that in many cases, external schottky clamp diodes are
not required.
RC: RC is the oscillator timing pin. For fixed frequency
operation, set timing capacitor charging current by con-
necting a resistor from REF to RC. Set frequency by con-
necting a timing capacitor from RC to GND. For best
performance, keep the timing capacitor lead to GND as
short and direct as possible. If possible, use separate
ground traces for the timing capacitor and all other func-
tions.
The frequency of oscillation can be estimated with the
following equations:
UCCx800/1/2/4:
F
RC
=
15
.
UCCx803, UCCx805:
F
RC
=
10
.
where frequency is in Hz, resistance is in ohms, and ca-
pacitance is in farads. The recommended range of timing
resistors is between 10k and 200k and timing capacitor is
100pF to 1000pF. Never use a timing resistor less than
10k.
To prevent noise problems, bypass VCC to GND with a
ceramic capacitor as close to the VCC pin as possible.
An electrolytic capacitor may also be used in addition to
the ceramic capacitor.
REF: REF is the voltage reference for the error amplifier
and also for many other functions on the IC. REF is also
used as the logic power supply for high speed switching
logic on the IC.
When VCC is greater than 1V and less than the UVLO
threshold, REF is pulled to ground through a 5k ohm re-
sistor. This means that REF can be used as a logic out-
put indicating power system status. It is important for
reference stability that REF is bypassed to GND with a
ceramic capacitor as close to the pin as possible. An
electrolytic capacitor may also be used in addition to the
ceramic capacitor. A minimum of 0.1
µF ceramic is re-
quired. Additional REF bypassing is required for external
loads greater than 2.5mA on the reference.
To prevent noise problems with high speed switching
transients, bypass REF to ground with a ceramic capaci-
tor very close to the IC package.
VCC: VCC is the power input connection for this device.
In normal operation VCC is powered through a current
limiting resistor. Although quiescent VCC current is very
low, total supply current will be higher, depending on
OUT current. Total VCC current is the sum of quiescent
VCC current and the average OUT current. Knowing the
operating frequency and the MOSFET gate charge (Qg),
average OUT current can be calculated from:
IQ
F
OUT
g
=× .
There should be a minimum of 1.0
mF in parallel with a
0.1
mF ceramic capacitor from VCC to ground located
close to the device


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